Improved chip testing procedures

Three testing procedures for QFN, DFN, CSP, and WLP semiconductor devices have been introduced to provide higher reliability, faster production rates, reduced capital costs for their customers, and lower overall production costs. Their high speed “Test on Tape“ process, using the MCT Tapestry Film Frame Handler, tests multiple package types & sizes without requiring mechanical conversion kits; the “Test After Singulation” process eliminates semiconductor defects normally caused by mechanical sawing after electrical testing; and BECCI’s proprietary “Wafer to Pocket Die Traceability” system tracks every unit from the wafer through the testing & inspection operations to the specific pocket on a reel of taped units.

Best Electronics & Components Company Inc.,www.usea.com