Octasic announces high performance asynchronous DSP core

Octasic has announced its Opus DSP architecture that changes the fundamental design of DSPs, which are the building blocks of communications equipment.

The Opus architecture solves the most pressing issue of the DSP industry, power consumption. Building a network that can deliver on the full promise of broadband communication will require more processing capacity in every piece of equipment. DSP manufacturers continue to pack more and more processing capacity into DSPs to meet this challenge but the power consumed by traditional designs is rising faster than the gains in capacity. With Opus, Octasic breaks this barrier by delivering unprecedented power to performance ratios.

Other architectures that deliver on lower power break the traditional programming model and require a new approach to developing and coding algorithms in order to achieve the low power benefit. Once this large investment is made in re-training programmers and re-writing code, the customer is locked in as all these approaches are proprietary.

One of the strengths of the Opus architecture is that it maintains a traditional programming model preserving customers' investment in applications and skill set. The ability to achieve such low power enables developers to leverage a multi-core DSP architecture without re-writing code. The Opus kernel and Integrated Development Environment (IDE) provide the tools necessary to quickly develop, test, and debug software for this high-performance DSP platform in a predictable fashion.

Octasic's Vocallo multi-core media gateway DSP product, also announced today (see related release on Vocallo), is the first Octasic product based on the Opus core. Vocallo represents a new generation of multi-core DSPs for media gateways, and is designed to allow OEMs to develop the products they require today, with the flexibility and expandability to evolve to future product generations.

Octasic