Virtex-5 FXT FPGAs target designs that demand high-performance processing and high-speed serial I/O

Xilinx has announced the availability of Virtex-5 FXT devices, said to be the industry’s first FPGAs with embedded PowerPC 440 processor blocks, high-speed RocketIO GTX transceivers and dedicated XtremeDSP processing capabilities. Comprising the fourth platform in the 65nm Virtex-5 family, Virtex-5 FXT devices deliver high performance while enabling designers to reduce system costs, board space and component count. With support from Xilinx and industry-leading providers of logic, embedded and DSP development tools, and IP cores, Virtex-5 FXT FPGAs deliver the ultimate system integration platform for applications in: wired and wireless communications, audio/video broadcast equipment, military, aerospace, industrial systems, and many others.

With this announcement, Xilinx has completed the introduction of the four domain-optimized Virtex-5 FPGA platforms that comprise the Virtex-5 family. The Virtex-5 family – the first FPGA family to deliver the performance, density, and cost benefits of 65nm – offers unprecedented performance and density gains with speeds on average 30 percent faster and a logic capacity 65 percent greater than previous 90nm generation FPGAs. Xilinx achieved this breakthrough performance while at the same time reducing dynamic power consumption by 35 percent relative to the previous generation devices. The four domain-optimized platforms – LX, LXT, SXT, and FXT – offer a wide range of devices that enable engineers to cost-effectively implement electronics systems by selecting an FPGA that incorporates the optimal mix of resources for their particular design: logic, I/O, and hardened IP blocks for logic-intensive, embedded processing, digital signal processing (DSP), and serial connectivity applications. For more information about the Virtex-5 family, please visit www.xilinx.com/virtex5.

Highest performance embedded processing block

The innovative Virtex-5 FXT platform offers the first FPGAs to provide up to two industry-standard PowerPC 440 processor blocks. Each processor, with integrated 32KB instruction and 32KB data caches, delivers up to 1,100 DMIPS at 550 MHz. Tightly coupled to the PowerPC440 blocks is a new integrated 5x2 cross bar processor interconnect architecture that provides simultaneous access to I/O and memory. Highly integrated, this innovative interconnect architecture includes dedicated master and slave processor local bus interfaces, four DMA ports with separate transmit and receive channels, and a dedicated memory bus interface enabling high-performance, low latency point-to-point connectivity.

Designers can rapidly and easily implement advanced scalable embedded processing applications using the PowerPC 440 embedded processor blocks. The advanced PLB architecture maximizes data transfers between the processor, crossbar and soft IP logic with high-throughput 128-bit interfaces to help minimize system bottlenecks. Also, the enhanced high-performance Auxiliary Processor Control Unit (APU) provides added connectivity for dedicated co-processing engines or custom user defined instructions in applications such as video processing, 3D data processing and floating-point math.

With the release of EDK 10.1, the PowerPC440 block in Virtex-5 FXT is supported by industry standard operating systems including Wind River Systems, Green Hills, and other key embedded OS providers. Linux support is provided through MontaVista, Wind River Systems with others soon to be added. In addition, Xilinx is actively engaged in the open source Linux community.

Xilinx