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| (Product News, 07 May 2008 ) |
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CEVA, Inc., a leading licensor of silicon intellectual property (SIP) platform solutions and DSP cores, announced its next generation DSP subsystem platforms for developers using the CEVA-X family of DSP cores. The robust solutions build on CEVA’s extensive track record of powering complex, multi-function communications products and offer a comprehensive and verified approach for efficiently integrating its cores into complex system on chips (SoCs). The platforms come in two versions, the CEVA XS-1100A optimized for wireless baseband applications, and the CEVA XS-1200A aimed at multimedia and other applications requiring high-performance signal processing.
These configurable, highly efficient hardware platforms reduce development effort, the risk of costly silicon re-spins and, ultimately, time-to-market for embedded processor applications. It uses industry standard system buses, offering designers the ability to add their own hardware blocks or connect the DSP to other systems present on chip, making integrating CEVA cores a very straightforward, efficient proposition. Both platforms support critical low power design requirements through CEVA’s smart Power Management Unit (PMU) technology, which includes automatic sleep/wake of each resource and matrix separately according to transaction type, source, destination, initiator and duration.
The two platforms - which have evolved through numerous customer engagements in targeted application areas - feature architecture enhancements that can significantly lower die size and power consumption, without compromising on performance. They are geared for the most complex and highly integrated SoCs, and feature a complete AHB matrix, DMA, TDM ports, power management, external master and slave ports, complete lineup of DSP-oriented peripherals and interface to L2 memories.
CEVA, Inc |
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