Berkeley Design Automation enters analog/RF mixed-signal verification

Berkeley Design Automation has announced the availability of true SPICE accurate analog/RF mixed-signal verification based on co-simulation of its award-winning Analog FastSPICE circuit simulator with leading Verilog HDL simulators. Numerous design teams around the world have verified that Analog FastSPICE Co-Simulation delivers identical results 5x-10x faster than any other true SPICE accurate solution.

Analog and RF design teams face increasingly difficult mixed-signal verification challenges. Complex blocks such as fractional-N PLLs, frequency synthesizers, and transmit and receive chains increasingly include complex digital logic. Nanometer CMOS ICs such as system-on-chips (SoCs), wireless transceivers, power ICs, and data converters have a rich mix of digital logic and high-performance analog/RF circuitry. Design teams want to verify their analog/RF circuitry with true SPICE accuracy together with their digital logic using their standard Verilog simulator. Doing so has become impractical or impossible with traditional SPICE due to their limited performance and capacity. Instead design teams have had to use analog/mixed-signal behavioral or digital fastSPICE simulators that sacrifice critical accuracy, thereby putting their whole project at risk. Analog FastSPICE Co-Simulation provides design teams an unprecedented combination of true SPICE accuracy, 5x-10x higher performance, and 5x-10x higher capacity – all using an industry standard flow.


Analog FastSPICE Co-Simulation uses a standard Cadence Analog Design Environment based flow, includes mixed-analog/digital debugging, and integrates with industry leading Verilog simulators including Cadence NC-Verilog, Cadence Verilog-XL, and Mentor Graphics ModelSim. The Analog FastSPICE circuit simulator uses standard Cadence Spectre and Synopsys HSPICE netlists and models and delivers identical results to traditional “golden” SPICE simulators 5x-10x faster and with 5x-10x higher capacity. The results are foundry certified down to 45nm. The capability is available immediately.

Berkeley Design Automation tools include Analog FastSPICE circuit simulation, Noise Analysis Option device noise analyzer, RF FastSPICE periodic analyzer, and PLL Noise Analyzer stochastic nonlinear engine. The company guarantees identical waveforms to the leading "golden" SPICE simulators down to noise floor (typically 0.1% or less) while delivering 5x-10x higher performance and 5x-10x higher capacity. It achieves this by using advanced algorithms and numerical analysis techniques to rapidly solve the full-circuit matrix and the original device equations without any shortcuts that could compromise accuracy.

Design teams from top-10 semiconductor companies to leading startups use Berkeley Design Automation tools to solve big analog/RF verification problems. Typical applications include characterizing complex blocks (e.g., PLLs, ADCs, DC:DC converters, PHYs, Tx/Rx chains) and running performance simulation of full circuits (e.g., wireless transceivers, wireline transceivers, high-speed I/O macros, memories, microcontrollers, data converters, and power converters).

Berkeley Design Automation