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Boost efficiency for low-cost flyback converters

( 01 Jul 2008 )
By John Betten and Brian King, Texas Instruments

In a conventional diode-rectified flyback converter, the output diode rectifier is a substantial power-loss contributor. The average current in the output diode is equal to the dc output current, and the peak current can be several times higher, depending on the duty cycle. The forward-voltage drop of the diode is typically 0.5V for Schottky diodes and 0.8V for standard PN-junction diodes. This large forward-voltage drop leads to relatively high losses in the diode and a substantial reduction in efficiency. Replacing the diode with a synchronous MOSFET significantly reduces these conduction losses. Figure 1 illustrates how you can convert a standard diode-rectified flyback supply into a self-driven-synchronous-flyback supply.

In the self-driven-synchronous flyback, an N-channel MOSFET replaces the output diode, and you must add a winding to the power transformer to generate the synchronous-gate-drive signal. The low on-resistance of the synchronous MOSFET yields much less conduction loss than the output-diode rectifier, significantly improving the efficiency at high load currents.

There is a fundamental difference between the operation of a diode-rectified flyback and a synchronous flyback. Figure 2 shows the key waveforms. The output diode in the diode-rectified flyback prevents the transformer secondary current from flowing backward. At light loads, this condition results in DCM (discontinuous-current-mode) operation in which the transformer's secondary current completely discharges into the output at the end of each cycle. The synchronous MOSFET allows current to continue to flow in the negative direction and forces the synchronous flyback to always operate in CCM (continuous-current mode) regardless of load current. This situation is generally beneficial in that the control loop gain does not decrease as it does when it transitions into DCM operation, thereby maintaining full dynamic performance, even at zero load. The use of synchronous MOSFETs has a negative impact on zero- or light-load efficiency, because relatively large ac currents flow with little or no net dc-output current. Transformer and primary-MOSFET switching losses associated with these circulating currents are larger than those in the diode-rectified flyback, whose currents decrease in amplitude at light loads.

Although the synchronous MOSFET significantly lowers conduction losses, it introduces gate drive, switching, and shoot-through losses that are not present in the diode-rectified flyback. Gate-drive losses result from the capacitance of the MOSFET gate that charges and discharges during each switching cycle. At the turn-on and turn-off transitions of the MOSFET, switching losses occur as the drain-to-source voltage and the drain current exhibit overlap. Shoot-through occurs because the primary switch must turn on before the secondary FET can start to turn off. This situation places a short circuit across the transformer during switching and can lead to substantial power loss. In the self-driven synchronous flyback, the primary-MOSFET turn-on commands the synchronous-MOSFET turn-off. Hence, it is impossible to eliminate the shoot-through currents when the power transformer directly drives the synchronous MOSFET. A self-driven synchronous MOSFET must have fast-turn-off delay and fall times to minimize shoot-through losses. Although a properly designed synchronous MOSFET introduces additional switching losses, the conduction losses are typically substantially lower than the diode-rectifier-forward-drop losses. This one benefit alone typically outweighs all synchronous MOSFETs' negatives.

Figure 3 shows how you can add an isolated gate-drive signal with programmable delays to the synchronous flyback to eliminate shoot-through losses. The device achieves isolation and level-shifting through a gate-drive transformer. A PWM controller with complementary drive outputs and adjustable delays, such as the UCC2897, is necessary to control the primary- and secondary-side synchronous MOSFETs. The delays must be long enough to ensure that the synchronous MOSFET is fully off before the primary MOSFET switches on. Excessive delay causes body-diode conduction on one or both of the MOSFETs and leads to excess power loss. Because the optimal dead time depends on the primary- and secondary-MOSFET delay, transition speed, power-transformer-leakage inductance, and gate-drive circuit, a controller with adjustable delay is critical to minimizing losses.

Figure 4 illustrates how to further improve the efficiency and take advantage of the synchronous-MOSFET-gate-drive signal to control an active primary snubber. This configuration is often called an active-clamp flyback. In the previous figures, the design employed a snubber to reduce the voltage spike on the drain-to-source voltage of the primary MOSFET. The spike occurs at turn-off of the primary MOSFET and is due to the leakage energy in the primary winding of the transformer. The RCD (resistor-capacitor-diode) snubber dissipates this energy in its snubber resistor. In the active-clamp flyback, the clamp capacitor captures the leakage energy, and the system recirculates it to the load and back to the input, resulting in a virtually lossless snubber. Figure 5 shows the drain-to-source voltage waveforms of an RCD snubber versus an active clamp. The active clamp eliminates the high-frequency spike. In addition to virtually eliminating the leakage losses, the design significantly reduces switching losses and EMI (electromagnetic interference). In many cases, the active-clamp snubber allows the use of a lower drain-to-source-voltage-rated primary MOSFET, which can further reduce losses and possibly reduce the cost of the MOSFET.

Figure 6 shows how much each upgrade to the diode-rectified flyback improves the efficiency of a real-world design. The power supply converts a telecom 48V-dc input to a 3.3V output with a maximum load current of 3.5A. Converting from a diode rectifier to a self-driven-synchronous-flyback device improves the maximum load efficiency by more than 7% but decreases the light-load efficiency below an output current of 1A. This situation occurs because of the gate-drive, switching, and shoot-through losses that the synchronous MOSFET introduces. These losses become a larger percentage of the total losses at light loads and consequently decrease light-load efficiency (Figure 7). Introducing a programmable dead-time delay significantly boosts the light-load efficiency by eliminating the shoot-through losses. The full load efficiency remains nearly identical, because other circuit losses dominate the synchronous-MOSFET losses. Finally, implementing the active clamp increases the efficiency of the 3.3V supply across all loading conditions.

Figure 8 shows two delay settings in the active-clamp circuit and how they affect the efficiency at different loading conditions. A longer delay, which you program on the UCC2897 by using a larger value for a delay resistor significantly improves the light-load efficiency by decreasing the shoot-through losses at light load. But this longer delay also increases the synchronous MOSFET's body-diode conduction time and, at full load, reduces the efficiency by about 1%. The full-load synchronous-MOSFET body-diode-conduction losses dominate the shoot-through losses when using a lower delay resistance. In some situations, you may have to choose between maximizing efficiency at light loads or maximum load by selecting the appropriate delay-resistance value. Figure 9 shows the active-clamp-flyback-power supply implementing all of the efficiency-improving techniques. This configuration yields nearly a 10% efficiency improvement at maximum load and has nearly the same light-load-efficiency performance as the original diode-rectified design.


Author's Biographies
John Betten is an application engineer and senior member of the group technical staff at Texas Instruments. He has 22 years of ac/dc- and dc/dc-power-conversion-design experience. He received a bachelor's degree in electrical engineering from the University of Pittsburgh and is a member of IEEE.
Brian King is an application engineer and a member of the group technical staff with Texas Instruments. He is a member of IEEE and holds bachelor's and master's degrees in electrical engineering from the University of Arkansas.



References
· Betten, John and Brian King, "Benefits of adding an active clamp to a synchronous flyback power supply," EDN, Dec 14, 2006, www.edn.com/article/CA6399933.
"UCC2897, Current Mode Active Clamp PWM Controller," Texas Instruments, www.ti.com/sc/device/ucc2897.





Captions

Figure 1 Replacing the output diode with an N-channel MOSFET and adding a winding to the power transformer to generate the synchronous-gate-drive signal can convert a standard dioderectified flyback supply (a) into a self-driven synchronous-flyback supply (b).

Figure 2 The output diode in the diode-rectified flyback prevents the transformer secondary current from flowing backward. At light loads, this situation results in discontinuous-current-mode operation in which the transformer’s secondary current discharges completely into the output at the end of each cycle (a). The synchronous MOSFET allows current to continue to flow in the negative direction and forces the synchronous flyback to always operate in continuous-current mode, regardless of load current (b).

Figure 3 Adding an isolated gate-drive signal with programmable delays to the synchronous flyback (a) can eliminate shoot-through losses (b).

Figure 4 In the active-clamp flyback (a), the clamp capacitor captures the leakage energy, and the system recirculates it to the load and back to the input, resulting in a virtually lossless snubber (b).

Figure 5 The drain-to-source-voltage waveforms of a programmable dead-time synchronous flyback circuit employ an RCD snubber (a) and an active clamp (b). The active clamp eliminates the high-frequency spike. In addition to virtually eliminating the leakage losses, this approach significantly reduces switching losses and EMI.

Figure 6 Using a power supply that converts a telecom 48V-dc input to a 3.3V output with a maximum load current of 3.5A as an example, each upgrade to the diode-rectified flyback improves the efficiency on a real-world design.

Figure 7 Introducing a programmable dead-time delay increases the light-load efficiency significantly by eliminating the shootthrough losses. The full-load efficiency remains nearly identical, because other circuit losses dominate the synchronous MOSFET losses. Implementing the active clamp increases the efficiency of the 3.3V supply across all loading conditions.

Figure 8 The delay resistor determines the dead time. In some situations, you may have to choose between maximizing efficiency at light loads or maximum load by selecting the appropriate delay-resistance value.

Figure 9 The active-clamp flyback power supply implements all of the efficiency-improving techniques, yields a nearly 10% efficiency improvement at maximum load, and has nearly the same light-load efficiency performance as the original diode-rectified design.



Click here for the illustrations:

Figure 1, Figure 2, Figure 3, Figure 4, Figure 5, Figure 6, Figure 7, Figure 8, Figure 9

 
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