Fab Services for Indian Fabless Semiconductor Companies

It is imperative that we expand our knowledge base in the advancement in semiconductor technology. We need to leverage the broad platform of this advancement and establish the right foundry partnership and participate in their progress. One of the key issues is to understand the technology roadmap, what is involved, identify the risk and challenges from 90nm to 65nm to 45 nm to 32nm to 22nm etc. What will be the competitive advantage of moving forward with leading-edge process? Smaller die? Increased performance? Lower power? Does all this justify the vertical that we will be after? So, all these need to be evaluated with respect to business environment.

IP Development
Because of the progress in nanometer technology, we are able to pack more circuitry and complex Systems-On-Chip or SoC. Because of the highly competitive market environment, building block architecture is the best approach in spinning new systems in record-time. Every product in the market is looking for a differentiating edge over the others. This is a huge challenge and to alleviate this Intellectual property (IP) development must be in the forefront of Indian chip companies’ product plan. We need to examine every productive vertical, ROI and next generation solution and then develop the required IPs.

We need address every possible vertical segment, work with right fab partners and participate in joint IP development activities. Because of the size of the Indian subcontinent market, we need to be aggressive in design-in activities and spin products with incremental design changes. This “Quick IP” concept will allow companies to keep market leadership as well as maintain the differentiating factors.

Semiconductor Ecosystem
What is the role of a fables company in the Semiconductor ecosystems? Although fab service is critical for the success of the fabless semiconductor company, the fab service must be well integrated with the semiconductor ecosystem that drives the fabless model. The semiconductor eco system illustrates the fab must be tightly coupled with front-end and back-end services that are essential for the success of the fabless semiconductor company. The front-end services include the library and design kit services, IP services and design services including the DFM and shuttles. The back-end services include package assembly, testing, failure analysis and supply chain management.

IC Product Development Cycle
Most fabless design houses rely on technology libraries that include std-cells, IO cells and memory compilers directly from the Fab service provider or an IP vender. Fab service provider has to provide necessary process data for the library developers and characterize the cells. In addition Fab service provider has to provide PVT models to estimate the characteristic variations and ESD structures for IO cell design. The timing and area characterization must be accurate to provide predictable results for the IC implementers. The accuracy and stability of library characterization depends on the process maturity and the quality is dependent on the Fab service provider. This is a critical factor for the IC product developer to deliver the product on time with quality and projected cost. In order to facilitate the physical design, fab service may offer physical design service directly or through the service partners. In this regard, fab service must establish an appropriate reference flow for physical design and verification sign-off.

The Fab service provider has to develop the mask, verify the mask and fabricate the silicon wafer. After the fabrication, the wafer probing and sorting, slicing, die packaging, assembly and testing are required to complete the Fab service and deliver the functional samples to the design house client.

Well-established Fab service providers may be self contained to provide all of the above essentials (library characterization, DFT and test vector generation, mask generation, wafer probing and sorting, slicing, package and assembly and testing) or well integrated with other partner service providers. In the case a new fab service developing from ground-up will require a significant amount of time to mature on the essential services of its own or through the partner providers. So, there may be IC quality issues and production issues in the case of new fab ramp-up period and there may be a considerable business risk for the fabless design house for using a new fab service starting from ground zero.


Supply Chain
As the IC production ramps up, the supply chain becomes an important service for the semiconductor companies to ensure the products are delivered on time to the customers without inventory bottlenecks. The fab service provider must be able to accommodate different production volume levels since its not going to be same for all products and for all design clients.

Design for manufacturability
With the increasing complexity in the advanced process technologies, migration from 90 to 22nm design rules has created challenging environment for manufacturing. The Deign for Manufacturability (DFM) is a critical component of the fab service to address the quality and reliability issues and yield enhancement to maximize the profitability. In relation to the quality control, Fab service provider has to support addressing the following typical issues from the clients:

· Process characterization quality
· Controlling the Process parametric variations under the limits
· Reliability of the process parameters to provide predictable results on the end product
· ESD structures
· Failure analysis and corrective actions
· Controlling Leakage current


Yield and Profitability
This is one of the key items of a company size as MosChip. The yield can impact the overall business model and add significant financial burden. If fab services directly or through partner service offer a turnkey contract for packaged functional product delivery from net list, the low yield could impact the profitability of the fab service and partners. However, if the fab service is providing the wafers to the design houses, yield is critical for the design house. So, the fab service must be able to constantly implement yield enhancement techniques to provide highest possible profitability to the customers. In addition to design rule optimization, circuit redundancy techniques are essential for yield enhancements. Memory cell redundancy is simple example which is an accepted practice in the state of the art designs and fab service should be able support memory test and repair services.Once again, in the case of new fab service provider, meeting the highest possible yield will require some time and process tuning.

You can reach Krishnan Venkatraman at raman@moschip.com, and
Sam Sanyal at sam@moschip.com