Analog floating-gate technology comes into its own

Just as its name implies, a floating-gate transistor’s driving terminal is electrically isolated from the rest of the device—that is, floating—so there is no direct internal dc path from the input terminal to the other terminals. Semiconductor companies became aware of this technology more than 40 years ago when they examined “defective” ICs that had broken electrical connections to the gate terminal. Little did they then know that they could use digital versions of these floating-gate transistors to store information in memories.

Over the last 10 years, however floating-gate design has emerged as a technique not just for memories but also for many classes of ICs. For example, you can use the gate voltage to represent a trim level for internal circuit nodes. Voltage references can also store the output voltage on a floating gate, and you can use floating-gate analog circuits to implement advanced signal-processing functions in audio-recorder chips—recording the audio as analog samples on the floating gates—in everything from cars to greeting cards.

Silicon Valley start-up GTronix has leveraged work on analog floating gates at the Georgia Institute of Technology to make analog signal-processing chips that store multiplier coefficients as analog voltages on floating-gate transistors. The parts find use in noise cancellation and beam steering, in which the chip improves the directionality of a microphone in a cell phone or a Bluetooth headset. Because the signal processing occurs in the analog rather than the digital domain of DSPs, power consumption is relatively minuscule. Perhaps just as important in some applications, the analog signal processing also has much lower latency from input to output. Researchers are also considering using analog floating-gate techniques to represent neural networks because analog storage can help them mimic the behavior of brain cells.

Digital floating-gate technology—and its analog counterpart—has had a lengthy evolution, which began in the late 1960s at Bell Labs, when researchers Dawon Kahng and Simon Sze evaluated the uses of charge storage on insulated gates. They hoped to use this storage as a replacement for ferrite-core magnetic memories (Reference 1). This research was an outgrowth of Kahng’s 1960 patent on FETs (field-effect transistors). In 1968, Horst Wegener, a researcher at Sperry Rand, received a patent on a FET memory element using charge stored on dielectrics, much as an electret microphone stores charge in wax.

By 1971, Intel’s Dov Frohman had filed a patent for a floating-gate device that designers programmed using an electron tunneling through oxide. This technology forms the basis of most current floating-gate memory. In 1972, Frohman received a patent for EPROM (erasable programmable read-only memory), which requires you to irradiate the die with UV (ultraviolet) light to erase the memory. By 1978, George Perlegos, also at Intel, had developed a floating-gate EEPROM (electrically erasable PROM, Figure 1 and Figure 2). In 1980, Fujio Masuoka at Toshiba developed flash memory, the ubiquitous storage medium that now finds use in everything from USB (Universal Serial Bus) sticks to MP3 players to digital cameras and solid-state disk drives. Flash memory does not allow you to erase individual memory locations as EEPROM does but is far cheaper to manufacture, as prices for memory sticks demonstrate.


Figure 1



Figure 2


Analog techniques have also crept into the flash-memory arena. SLC (single-level-cell) solid-state flash drives work like traditional memory cells: You program the cell to either a one, which is full voltage, or a zero, representing no voltage. MLC (multilevel-cell) memory incorporates more analog elements. You program a cell to one of four levels, representing 2 bits of data, effectively doubling the memory capacity. Everything in the analog domain comes with trade-offs, however. For example, with MLC drives, you gain capacity at the expense of a worse BER (bit-error rate) and a reduced lifetime because you cannot overwrite MLC devices as many times as you can SLC devices. MLC devices also require error-correction circuitry to reduce the BER.

Analog evolution
In 1988, Richard T Simko of ISD (Information Storage Devices, now Nuvoton), built on the digital floating-gate patents he obtained in 1979 while at Xicor with a patent for high-density-IC analog signal recording and playback (Figure 3). This patent was the basis for Nuvoton’s ChipCorder, an analog IC that records and plays back audio using floating-gate storage techniques. As Simko states in the patent, the device can electronically store analog information with reasonable precision but with substantially less complexity and memory capacity than digital techniques require. With the system, small errors in recording the signal information do not damage the reproduction quality during playback.


Figure 3

Analog audio storage has many advantages over digital methods. For example, a digital-memory audio system might record 8000 8-bit samples/sec, whereas an analog memory cell could store that same sample in one cell, an eight-to-one advantage. As Geoff Jackson, chief technology officer at Nuvoton, notes, analog floating-gate technology with large memory cells and 8-bit samples can achieve fidelity equivalent to that of 10- or 12-bit samples. Farid Noory, senior technical-marketing manager at the company, notes that the parts can sample analog data at a 4- to 16-kHz sampling rate.

Programming a floating-gate memory cell to a desired analog voltage is not trivial (Figure 4). It involves the layout geometries, the thickness of the insulating oxide, and the field-strength profiles of each cell, so you cannot be sure that every cell you expose to an identical programming pulse will program to the same analog voltage. One of Simko’s fundamental contributions provides for a series of pulses to the floating gate. The chip measures the resultant analog programmed voltage after each pulse, so that programming circuitry can stop the pulses when each cell reaches the proper voltage. As Simko notes in his 1988 patent, writing is an iterative, trial-and-error process because the analog input signal is only 1 to 2V, for example, and the voltage to charge a floating-gate memory cell may be 7 to 17V. Further, he notes, programming a cell may require as many as 400 pulses, but the chip can program a column of memory cells at once, with the iterative programming process occurring in parallel.


Figure 4

Today, Nuvoton calls its analog floating-gate parts MLS (multilevel-storage) devices, with which it implements a complete audio-recording and -playback SOC (system on chip, Figure 5). The ChipCorder IC includes a voltage regulator, a charge pump to make the programming voltage, a microphone preamplifier, memory, a PWM (pulse-width-modulated) power amplifier to run the speaker, the analog memory array, switch-debouncing circuits, and an SPI (serial peripheral interface) to a computer. The parts won an EDN Innovation Award in 1991, and Simko and his co-workers Trevor Blyth and Sakhawat Kahn were finalists for Innovators of the Year in EDN’s 1991 Innovation Awards (Reference 2).


Figure 5

The analog storage paradigm works well and is cost-effective for short recordings. For example, the ISD5216 chip uses analog floating gates to record and play back 16 minutes of audio. For longer recordings, Nuvoton offers chips such as the ISD151016, which uses digital storage, conventional flash memory, DACs, and ADCs, to record and play back 16 minutes of audio with better SNR (signal-to-noise ratio) than analog techniques can achieve. Deciding on an analog memory versus a digital one depends on your budget, taking into account the costs of flash versus those of an analog process. Analog processes tend to have larger features than those of a current flash-memory die with its 45-nm features.

DC is analog, too
As early as 1989, researchers had proposed the use of floating-gate analog FETs as a trimming element for ICs (Reference 3 and Reference 4). Then-start-up Impinj planned to use floating-gate structures to hold analog trimming voltages. In 2003, the company tried to develop a floating-gate circuit using conventional high-density CMOS, instead of the CMOS process with larger features and more process layers that EEPROM cells use. At the time, the company’s Web site touted its mission as “developing floating-gate transistors that are analog memory devices but [that] retain all the attributes of conventional CMOS transistors.” The practical aspects of this approach proved so difficult that Impinj had begun by 2005 to downplay its analog floating-gate technology and became a supplier of RFID (radio-frequency-identification)-tag silicon (Reference 5). By 2007, the company’s engineers were writing articles that indicated it is more practical to use standard-logic CMOS floating-gate structures as digital storage devices (Reference 6).

This turnabout does not mean that analog floating-gate trimming structures are impractical. It does indicate, however, that if the use of a conventional fine-line CMOS is necessary to achieving your cost goals, you are better off using digital storage. Nevertheless, by acquiring Xicor in 2004, Intersil gained the expertise to offer a line of analog parts that uses floating gates to store an analog voltage. With a voltage reference, only one floating gate—the one that holds the part’s reference voltage—is necessary. Because analog parts do not need the benefits of fine-line CMOS for smaller die, it is suitable to use a more complex CMOS process that has coarser line widths and more process steps to do the floating-gate structure. The die for a reference is small enough that the line-width penalty is not too severe.

Designers at Intersil can make the floating-gate structure in the voltage reference relatively large, allowing them to program the gate voltage to a precise level during manufacturing—a difficult task. “One benefit of floating-gate structures is that the temperature coefficient is substantially linear; it does not have a bow,” easing temperature compensation, says Barry Harvey, a design fellow at Intersil. This linearity also means that you can program the gate to any voltage within reason, he adds. References using floating-gate structures have lower noise at smaller supply currents than do bandgap-based parts.

Intersil programs the parts in several steps. Further, the IC-design layout is complicated and prone to error, and package stress can affect the parts. “There are all these mobile ions in an IC process… really bad when you are storing charge on a floating gate,” says Harvey. With clever design, process, and manufacturing, Intersil has overcome these problems. Few design tools are available to help designers craft a single floating-gate analog storage cell, so the engineers at Intersil had to spend considerable time and effort understanding the effects of process type and process variation on the devices’ functions. Charge leaking off the gate is on the order of a few electrons per second, so the parts are suitable for decades of use, even at higher automotive temperatures (Table 1).


Table 1


Analog processing
Several trade-offs in using an analog floating gate include whether you are using a fine-line CMOS process, the size of the die you are using, and the number of floating-gate storage cells your design requires. Another trade-off may make the use of floating gates especially desirable when you wish to keep your signal processing in the analog domain. Analog signal processing uses less power and has lower latency than its digital counterpart. Although digital signal processing has become ubiquitous, it involves a significant power penalty. You must digitize the signal, and the fast clock rates in the digital processing core use a lot of power. Further, you often must convert the signal back into the analog domain. A digital system can perform a 64-point FFT (fast Fourier transform) using 520 mW of power, whereas an analog signal-processing chip uses 13 mW. The analog die is also one-fifth the size of the digital die.

The fact that digital systems are, out of necessity, sampled-data systems gives rise to latency problems. These problems occur not just because of the delay necessary for taking a sample but also because digital signal processing uses filters that require digital feedback to locations in a shift register. The number of samples in that register dictate the latency that your system must suffer when you perform digital signal processing. In addition to higher power and long latency, the register requirements may require the storage of digital coefficients, so your CMOS process is more expensive because it must encompass EEPROM or flash-memory cells. For this reason, many DSP systems use an outboard EEPROM to store coefficients, allowing you to use silicon with the cheapest fine-line, logic-only CMOS process that has the smallest die and the fewest masks.

A pioneer in the use of analog signal processing, GTronix has licensed several patents from the Georgia Institute of Technology. Knowing that analog signal processing would be beneficial for battery-powered systems, GTronix has concentrated on designing parts for cell phones, mobile devices, and Bluetooth headsets. One product line includes chips for beam forming in mobile phones. The module combines two carefully spaced microphones and an analog signal-processing chip, allowing the phone to reject noise sources from the side and back (Figure 6). The technique yields significant improvements in clarity and reduction in background noise. The company is also pursuing active noise cancellation, such as that in today’s consumer headphones. Although these headphones might already use analog techniques, the GTronix chip combines the analog functions into one chip, further reducing power (Figure 7).


Figure 6


Figure 7

Using floating-gate storage and analog signal processing, you can implement almost any signal-processing function (Figure 8). For example, you can design systems that perform DCTs (discrete cosine transforms), the mathematical basis for the compression that MP3 audio and JPEG images use. The only driving factor is that the application benefits from low latency and requires low power. Performing signal processing in the analog domain yields enough benefits to justify the increased cost of a CMOS process that has wider lines to support analog as well as more masks in production to make the floating-gate structures. If you have a large digital chip that supports flash memory, you may be better off doing your signal processing in digital, but there are more and more applications that benefit from removing functions from a large digital chip and putting them into specialized analog chips with process and power benefits. Today’s small IC packaging enables this trend. You can thus add a small analog chip to your system with almost no penalty in the PCB (printed-circuit-board) area.


Figure 8

The future
The future of analog floating-gate technology will bring further improvements in applications of audio storage, voltage references, and analog signal processing. Saleel Awsare, president of Nuvoton, sees applications in appliances and automotive, consumer, and medical devices. He envisions defibrillators that provide spoken instructions and smoke detectors that provide exit instructions, among others. Spoken warnings and instructions are far less distracting to drivers, so the chips have limitless potential in automotive applications. Hubert Engelbrechten, chief executive officer at GTronix, sees applications as diverse as glass-breaking detection, accelerometer signal processing, and medical-microsensor monitors. Researchers have also been looking at using analog floating gates as the building blocks for silicon that mimics the neural networks in brains (Reference 7 and Reference 8). When you look at the function of the optic nerve, for example, you can see that the nerve is performing a significant amount of signal processing, greatly reducing the amount of information the eye sends to the brain. These functions are perfect applications for analog floating-gate structures because they can store processing coefficients in one silicon memory cell.

Spin-offs from neural research will give us many more applications for analog floating-gate technology in sensor signal conditioning. Ongoing research involves improving the accuracy and time required for programming a cell (Reference 9). Analog floating-gate technology may have taken decades to warm up, but it is sure to be a hot technology in the coming decade.
Author Information
You can reach Technical Editor Paul Rako at 1-408-745-1994 and paul.rako@ edn.com.

References
1. Kahng, Dawon, and Simon M Sze, “A floating-gate and its application to memory devices,” The Bell System Technical Journal, Volume 46, No. 4, 1967, pg 1288.
2. Second Annual Innovation Awards, EDN, 1991.
3. Carley, LR, “Trimming analog circuits using floating-gate analog MOS memory,” IEEE Journal of Solid-State Circuits, Volume 24, Issue 6, December 1989, pg 1569.
4. Harrison, Reid R, Julian A Bragg, Paul Hasler, Bradley A Minch, and Stephen P Deweerth, “A CMOS Programmable Analog Memory-Cell Array Using Floating-Gate Circuits,” IEEE Transactions on Circuits and Systems—II: Analog and Digital Signal Processing, Volume 48, No. 1, January 2001.
5. Wilson, Ron, “Programmable fuse IP finds life after RFID role,” EE Times, Feb 7, 2005.
6. De Vries, Ma, “A logical approach to NVM integration in SOC design,” EDN, Jan 18, 2007, pg 73.
7. Lee, BW, BJ Sheu, and H Yang, “Analog floating-gate synapses for general-purpose VLSI neural computation,” IEEE Transactions on Circuits and Systems, Volume 38, Issue 6, June 1991, pg 654.
8. Fujita, O, and Y Amemiya, “A floating-gate analog memory device for neural networks,” IEEE Transactions on Electron Devices, Volume 40, Issue 11, November 1993, pg 2029.
9. Smith, PD, M Kucic, and P Hasler, “Accurate programming of analog floating-gate arrays,” IEEE International Symposium on Circuits and Systems, Volume 5, May 2002, pg V-489.
Captions
Figure 1: You program this floating-gate memory cell by putting 12V on the metallization over the floating gate. Electrons tunnel through the insulating oxide layer to program the gate.

Figure 2: You erase this floating-gate memory cell by changing polarities to discharge the gate.

Figure 3: The 1989 patent on floating-gate analog audio storage describes the architecture of the chips.

Figure 4: Programming an analog floating gate is complex. You must put repeated pulses on the programming gate and measure the results. This approach accommodates process variations (courtesy Nuvoton).

Figure 5: A floating-gate analog recording device is an entire system on a chip (courtesy Nuvoton).

Figure 6: The GTX0050 cancels out noise from off-axis to a pair of microphones in GTronix’s IR-reflow solderable module.

Figure 7: Using a discrete approach (a) takes up more space than using analog signal processing, as GTronix does with its GTX0050, which cancels out noise to a pair of headphones (b).

Figure 8: Analog floating gates allow signal processing in the analog domain, saving considerable power and reducing latency. Processing algorithms for constant-Q filter banks (a), vector-matrix multiplication (b), Gaussian-mixture models (c), and adaptive filters (d) are available to designers (courtesy GTronix).