eASIC Announces Availability of Aeroflex Gaisler's LEON4 Processor

eASIC Corp. has announced the immediate availability of Aeroflex Gaisler's next generation LEON processor, the LEON4, as part of its eZ-IP Alliance Core Library. LEON4 is a high performance, 32-bit processor core based on the SPARC V8 architecture. The new LEON4 core complements the widely used LEON3 processor for high-performance embedded applications across a broad spectrum of demanding consumer and industrial applications.

The power and size optimized LEON4 is fully software compatible with previous LEON processors, yet with a performance increase of up to 50 percent at the same clock frequency. The LEON4 processor implements single-cycle load/store instructions, as well as static branch prediction. The register file and internal load/store data paths have been extended to 64-bits, while the data cache and bus interface can be either 64- or 128-bit wide. An optional Level-2 (L2) cache has also been added to the architecture, further improving performance on data intensive and multi-core applications. The LEON4 processor delivers up to 1.7 DMIPS per MHz or 0.35 SPECINT2000/MHz.

For more information, please visit www.easic.com/embedded.

eASIC