Calypto to power-management experts: Have it your way

Calypto Design Systems has for some time now successfully leveraged its core technology—sequential analysis of synchronous logic circuits—into a full suite of tools to reduce power consumption. Analyzing your RTL (register-transfer-level) logic, the Calypto tools identify opportunities to apply fine-grained clock gating and fine-grained use of sleep modes in memory instances. The tools then reorganize the RTL logic if necessary, insert enable signals into the code, and provide a formal equivalence check to make sure they didn’t break anything. All of this action takes place before synthesis, during which you in theory still have the most leverage over active and leakage power. The company claims that the tools can reduce power consumption by as much as 60%.

This approach should be great news for teams working on power-constrained designs. Ironically, though, the one group that is in the best position to appreciate what the Calypto tools do—power-management experts—has had an issue: automation. RTL gurus don’t want a tool taking liberties with their code, even if it does the right thing. Addressing that issue, Calypto recently announced the PowerAdviser flow, which the company based on Release 3.1 of its PowerPro package. In this flow, the tools analyze your RTL, and PowerAdviser makes recommendations without altering the code.

The flow offers three categories of information in its reports. First, the analyzer generates clock-gate-enable and memory-mode-enable expressions based on your RTL. You can review these expressions at your leisure and drop those that you like directly into your code. This approach is in essence a manual version of the PowerPro CG and MG tools. Second, the analyzer suggests changes to the RTL that would enable further clock- or memory-gating opportunities. For example, the tool might suggest importing a mode-control signal from upstream, making it possible to gate the clock on a register when there is no activity on the block’s inputs. If you like PowerAdviser’s suggestions, you can modify your RTL and then rerun PowerAdviser, which then generates the correct expressions.

Third, PowerAdviser suggests changes to your microarchitecture that would open up even more gating opportunities. For example, the tool spots registers that rarely change but are not efficiently clock-gated and registers that toggle often in situations in which their outputs don’t affect other circuits. You can look into these areas of the design and, if it’s appropriate, reorganize them and then return to PowerAdviser to get the enable expressions.

Calypto Design Systems
www.calypto.com