Reconfigurable Single-chip Radios

In the future, mobile devices will have more and more access to all kinds of communications and multimedia services. They will have access not only to mobile-phone networks and the mobile Internet, but also to global-positioning systems, broadcasting services, WLAN (wireless-local-area-network) services, short-range connectivity, and many others. These future devices will also function in all kinds of situations-at home, in the office, during travel, and so on. ICs for these future mass-market wireless-communication consumer applications will be competitive only when they become small, energy-efficient, and cost-effective.

Terminal performance
Ideally, a single mobile terminal should be able to accommodate all the communications functions a consumer would want. To ensure that such a terminal is low-cost, it is essential to minimize the area or form factor of the IC that implements the necessary communications functions within the terminal. The only way to achieve that goal is through extreme IC integration because IC integration can add features to a chip without increasing its area. Moreover, the IC should thus not just be a single-chip multistandard radio but instead a flexible radio chip. The RF part should integrate with the digital part of the radio in a single-chip SOC (system on chip). The flexible radio chip should be software-reconfigurable over a large range of communication standards, and it should be able to do the same job as several separate single-mode radios.

Due to its flexibility, a software-defined radio would also enable the new mobile terminals to choose the best standard for each situation. As a result, its flexibility will enhance the quality of the service and will enable the terminal to optimize its energy efficiency.

Integrating the RF part of the radio with the digital part onto a single IC is one of the main challenges. Engineers must perform this integration in a digital-scaled nanometer technology, in which it is essential to minimize the area of the RF part. People commonly assume that analog circuits do not scale with technology, which could endanger the cost advantage.

Researchers at IMEC (Interuniversity MicroElectronics Center), however, along with its partners, have succeeded in solving this challenge. The researchers have proved that the scaling of the analog part is possible and have demonstrated this ability by realizing a high-performance, low-area, reconfigurable single-chip radio. The new chip is a 5-mm2, flexible RF transceiver in 40-nm, low-power digital-CMOS technology (Figure 1). The chip exhibits RF performance that is comparable with that of state-of-the-art multiple-chip radios (References 1-3). To achieve this size and high performance, the company used the benefits of aggressively scaled low-power CMOS technology, such as the high intrinsic speed of the nanoscale transistors and less variability between the transistors. Engineers combined the use of the technology with a fundamental rethinking of radio-circuit architectures and designs to ensure that the analog-unfriendly nature of nanoscale technology would not degrade performance.


FIGURE 1

Analog circuits do scale
On-chip capacitors provide examples of analog's ability to scale down. Earlier generations of capacitors needed expensive technology options to create MIM (metal-insulator-metal) capacitors, but nanoscale CMOS technology and the progression in lithography techniques and metal stacks have resulted in MOM (metal-oxide-metal) capacitors. These capacitors enable a much higher capacitor density. MOM capacitors are purely digital, meaning that they are free, along with the normal digital processing. Hence, in new CMOS nodes, analog circuits do partially scale down in area.

Moreover, the technology's matching parameters improve along with the progression in the processing techniques. The better transistor matching per area is another argument that analog circuits do scale. Analog circuits profit from better process control, which results in smaller transistors that are now more identical to each other than were the transistors of 10 years ago. The result is a significant increase in the transistor density, minimizing the area and increasing the performance.

Analog's scaling benefits are limited, however. Therefore, most improvements in nanometer CMOS radio circuits must come from a fundamental rethinking of the front end's circuit and architectures. In this case, it is crucial to limit the large area penalty that is associated with the use of inductors for high-frequency operation. The best way to minimize the area would be to remove the inductors from the RF circuits. In some cases, you can now eliminate the use of inductors in the circuit design because the design uses 40-nm transistors. These nanoscale transistors have a much higher intrinsic speed than the transistors of larger nodes.

In other cases, you cannot eliminate the use of inductors because they are essential to maintaining the circuit's performance. In that case, you can minimize the area and maintain the circuit performance by designing circuit architectures using small inductors with a slightly lower quality. New low-noise amplifiers, for example, allow the use of low-Q inductors without degrading performance. Finally, in some cases, the use of inductors is unavoidable, as in, for example, VCOs (voltage-controlled oscillators). In this case, you can use circuit architectures that operate at higher frequency and that require smaller inductors and, hence, smaller area.

Digital control
An equally important strategy for area limitation is the use of heavy digital control and digital compensation of the analog circuits. Whereas designers once used analog techniques to solve the variability in analog circuits, they can now use digital-control mechanisms. You use software to make the analog blocks digitally reconfigurable so that they can adapt themselves to the required performance and so that you can compensate for process variability.

You solve other analog imperfections that occur, such as mismatch and linearity errors, not by making the transistors larger but instead by using digital-signal processing-for example, by applying clever digital algorithms and calibration techniques. The transistors for this digital control are very small and thus involve practically no overhead cost with respect to area and power consumption.

The realization of a high-performance, low-area reconfigurable single-chip radio is essential for future mobile terminals in which low-cost, low-area, and energy-efficient approaches will be necessary in wireless-communication applications for the high-volume consumer market.

Author Information
Jan Craninckx obtained his master's and doctoral degrees in microelectronics summa cum laude from the ESAT-MICAS laboratories of the Katholieke Universiteit Leuven in 1992 and 1997, respectively. His doctoral work was on the design of low-phase-noise CMOS-integrated VCOs and synthesizers. From 1997 to 2002, he worked with Alcatel Microelectronics (later part of STMicroelectronics) as a senior RF engineer on the integration of RF transceivers for GSM, DECT, Bluetooth, and WLAN. In 2002 he joined IMEC (Leuven, Belgium), where he currently is senior principal scientist in the analog-wireless research group. His research focuses on the design of RF-transceiver front ends for software-defined radio systems, covering all aspects of RF, analog, and data-converter design. Craninckx has authored and co-authored more than 70 papers and several book chapters and has published one book on analog- and RF-IC design. He holds 10 patents. He is the chairman of the SSCS Benelux chapter, is a member of the Technical Program Committee for both the ISSCC (International Solid-State Circuits Conference) and European Solid-State Circuits Conference, and is associate editor of the Journal of Solid-State Circuits.

Piet Wambacq, principal scientist at IMEC, received a master's degree in electrical engineering and a doctorate from the Katholieke Universiteit (Leuven, Belgium) in 1986 and 1996, respectively. Since 1996, he has been with IMEC (Leuven, Belgium), working as a principal scientist on RF-CMOS design for wireless applications. He is also a professor at the University of Brussels (Vrije Universiteit Brussel). Wambacq has authored or co-authored two books and more than 150 papers. He was an associate editor of the IEEE Transactions on Circuits and Systems from 2002 to 2004. He is the co-recipient of the Best Paper Award at the DATE (Design, Automation, and Test Conference) in 2002 and 2005. He is also a member of the program committee of the European Solid-State Circuits Conference.


SIDEBAR
IMEC Addressed EUV and Neuroelectronics in 2009
Nanotechnology research center IMEC (Interuniversity MicroElectronics Center) announced at its General Assembly meeting on April 30 that 2009 had been a satisfying year, with IMEC's total revenue amounting to €275 million, including €222 million coming from collaboration with the global industry. In addition, the Flemish government granted IMEC €44.7 million, and the Dutch government granted €8 million to IMEC the Netherlands at the Holst Centre.

In addition to its work with "green" radios, IMEC has been focusing on EUV (extreme-ultraviolet) lithography. The organization reports that it last year employed EUV lithography to fabricate the first functional 22-nm SRAM cell.

IMEC also took advantage of continuing transistor scaling to address new nanoelectronics and neuroelectronics applications. In 2009, the organization developed a micronail chip, which can make intimate contact with neurons, enabling it to stimulate neurons and read their signals. Researchers associated with the Neuroelectronics Research Flanders initiative will use the chip to help unravel the secrets of the human brain. In addition, in 2009, IMEC successfully launched its solar-cell research program, in collaboration with companies such as Schott Solar, Total, GDF Suez, and Photovoltech.

IMEC's said its headcount exceeds 1750, including more than 550 industrial residents and guest researchers. It produced more than 1750 conference papers and publications during the year, often in collaboration with universities worldwide.

"Innovative organizations are in constant movement," says Luc Van den hove, president and chief executive officer of the center. "IMEC is no exception to that [trend]. In 2009, we worked hard to combine the strengths of our diverse expertise, independent of the location where research is performed. More and more innovation depends on combining knowledge in diverse disciplines," including technology, design, applications, and packaging. Van den hove adds, "This is our way to prepare for the future [and] to tackle the technological and the economical challenges ahead because we are convinced that open innovation and global collaborations are the key to progress."


References
1. Giannini, Vito, Pierluigi Nuzzo, Charlotte Soens, Kameswaran Vengattaramane, Julien Ryckaert, Michael Goffioul, Björn Debaillie, Jonathan Borremans, Joris Van Driessche, Jan Craninckx, and Mark Ingels, "A 2-mm2 0.1- to 5-GHz Software-Defined Radio Receiver in 45-nm Digital CMOS," Technical Digest of the IEEE International Solid-State Circuits Conference, February 2009, San Francisco, CA, pg 408.
2. Giannini, Vito, Pierluigi Nuzzo, Charlotte Soens, Kameswaran Vengattaramane, Julien Ryckaert, Michael Goffioul, Björn Debaillie, Jonathan Borremans, Joris Van Driessche, Jan Craninckx, and Mark Ingels, "A 2-mm2 0.1- to 5-GHz Software-Defined Radio Receiver in 45-nm Digital CMOS," IEEE Journal of Solid-State Circuits, Volume 44, No. 12, December 2009, pg 3486.
3. Ingels, Mark, Vito Giannini, Jonathan Borremans, G Mandal, B Debaillie, P Van Wesemael, Sano, T Yamamoto, D Hauspie, J Van Driesche, and Jan Craninckx, "A 5-mm2 40-nm LP CMOS 0.1- to 3-GHz Multistandard Transceiver," Technical Digest of the IEEE International Solid-State Circuits Conference, February 2009, San Francisco, CA, pg 458.