Design Suite Enables up to 30% Dynamic Power Reduction

Xilinx Inc.’s ISE Design Suite 12 software enables breakthrough optimizations for power and cost with greater design productivity. The ISE design tools deliver ‘intelligent’ clock-gating technology that reduces dynamic power consumption by as much as 30 percent, provides advances in timing-driven design preservation, AMBA 4 AXI4-complaint IP support for plug-and-play design, and an intuitive design flow with fourth-generation partial reconfiguration capabilities that lowers system cost for a broad range of high performance applications.

The latest ISE 12 release has full production support for all Xilinx Virtex-6 and Spartan-6 FPGA families, with interoperable design flows and tool configurations for logic, DSP, embedded processing, and system-level design. In addition, the software features infrastructure and methodology enhancements that improve run time, streamline system integration, and expand IP interoperability across its latest generation device families and Targeted Design Platforms.

Xilinx Inc.