Current MCU market trends in the CE space

While relatively unsophisticated 8-bit MCUs still dominate the cumulative installed base of MCUs in the CE device space, some trends have emerged in the last few years:

• MCU vendors introducing devices built around 3rd party embedded cores to co-exist with their existing proprietary architectures
The most visible example is the introduction of ARM Cortex-Mx based devices by nearly all the traditional MCU manufacturers. In due course of time, some of these vendors will completely retire their own proprietary lines and focus solely on introducing a wider range of Cortex-Mx based MCUs.

• 32-bit architectures replacing 8-bit and 16-bit architectures
While the venerable 8051s [including their modern souped-up versions], the PIC(8)s and the AVR(8)s will continue to exist in their niches, massive socket erosion is expected towards 32-bit architectures [with the Cortex-Mx once again taking the lion’s share].

• Increased analog integration
Modern CE MCUs increasingly resemble their counterparts from the Industrial/Automotive segments with significant on-die analog content. Multi-channel ADCs, integrated PoR, Brown-out-detectors, temperature sensors, USB-battery chargers and multiple on-die LDOs are routine on mainstream MCUs.

• Hardware acceleration and security
The MCU market is fiercely price sensitive and product differentiation [in an essentially catalog market] is vitally important. The first wave of differentiation in modern MCUs came via increased integration [larger FLASH / SRAM, more IO standards supported, more GPIO, more analog interfaces etc.] and via more family variants [packages ranging from the base QFP to BGA, voltage ranges from 1.5V to 5V etc.] Today, differentiation is provided by integrating custom hardware-assist engines that improve performance and reduce the power envelope [eg: summation / averaging engine tacked on to the ADCs, hardware engine to compute motion and position of a camera zoom lens, clock modulation unit that reduces EMI by randomizing the spectrum of the on-chip clock network, hardware audio decoder etc.] On similar lines, CE MCUs integrate a higher content of hardware security features [eg: SHA / AES engines for authentication, stronger access privilege level implementations via MPUs, more robust encryption of FLASH code etc]

• Multi-market MCU deployment
Traditionally MCU implementations were limited to 180nm and 130nm Flash processes; as newer MCU devices are being realized on 90nm Flash processes [and to a lesser extent 65nm], cost recoupment considerations are calling for a more generic MCU architecture that can serve multiple application spaces. A common platform based approach is adopted by major MCU vendors allowing either the same silicon to be reused for different applications via software updates or via the ability to quickly spin a specific derivative MCU from a superset MCU device. Note that at the same time, the role of classical MCUs will reduce in high-end CE applications [eg: LED TVs, STBs] as mainstream media processor ASSPs will dominate in these spaces.

• Free software ecosystem
A significant advancement in the software ecosystem around MCUs is the free shipment of near-product-ready application specific software implementations by all major MCU vendors. Note that these freely shipped components are not limited to the routine peripheral driver libraries, flash programming utilities, reference linux ports etc but complete application modules [eg an USB-driven multi-channel audio receiver implementation.] It is not uncommon to find an OEM choosing an MCU [from among half a dozen relatively non-differentiated-by-feature-or-cost families from different MCU vendors] only because a suite of reference application modules are available for free for that MCU.

Wipro’s experience in the MCU space
Wipro’s Semiconductor & Systems Business Unit (SnS) has had rich experience in the 32-bit MCU space. Starting with a single CE MCU silicon development in 1998, SnS today works with 6 of the top 10 MCU vendors. Over this 12-year period, a wide variety of customer types, requirements and strategies have been witnessed and three contrasting examples have been highlighted below:

a) ARM7-based Win-CE compatible MCU targeted at palmtop computing
Implemented on a 350nm IDM process for an MCU startup, this device was targeted as a single-silicon solution (ie no family variants planned at the outset of the program). For its time, this was a very powerful device loaded with dual LCD controllers, a micro DSP engine for speech processing, two-independent (bridge-based) on-chip bus layers for high-throughput data movement and a host of standard IO interfaces (SPI, UART, SmartCard, MMC, Infra-Red, PWM channels etc). Being a one-off device, the development flow was relatively simple without the need for configurable IP, major pin-muxing requirements or auto-generation mechanisms for derivatives. Flash was off-chip and power management control was relatively trivial.

b) ARM9-based MCU targeting Media Players
Conceptualized by a tier-2 MCU player, the architecture for this device was purpose-built for medium-end AV processing with a limited family approach (3 devices) having been planned from the very beginning. Exploiting the higher gate densities on a TSMC 90LP process, these devices integrated 30+ “standard” digital IP blocks using 6-layers of high performance matrix-based AHB interconnect. Key differentiating IP included a programmable multi-format cryptography accelerator [supporting SHA, MD5, RSA, DES, AES etc], Audio accelerator for MP3, Video accelerator [supporting H.264, MPEG4, MJPEG as well as imaging effects control]. Sophisticated power management schemes were employed to achieve the least power profile required by each family variant [eg: audio only variants could completely power-gate the video sections off]. Being conceived as a family of devices, the architecture and the development flow supported significant configuration options - from the ability to easily migrate from one ARM9 processor variant to another more advanced variant, automated pin-muxing RTL code generation to support 8 different package [including MCM] variants, auto-generation of minimal boot-code to support only those specific I/O interfaces available on a particular device variant.

c) Proprietary core-based Multi-market MCU devices
In contrast to the previous two examples, the scale of this program – developed for a world-leading MCU vendor – was significantly larger. Targeted to an IDM 90nm Flash process, this MCU product family roadmap extended to several 10s of devices. There were 5 sub-lines under the base product family targeting applications intersecting the CE, automotive and industrial automation fields. If all combinations of memory sizes, peripheral set, packaging and speed grade options were considered, the family would contain 50+ devices. The development approach required to address this scale is quite different from the previous two cases. Using XML based encapsulation methods, each IP was up-front designed in a heavily configurable format; third-party IP vendors were persuaded to introduce the appropriate meta-data into their existing IP to conform to the prescribed XML approach. Massive effort was expended to extend the IP-level configurability to the full-chip level until it was possible to auto-magically generate a derivative SoC RTL [supported by appropriately auto-modified verification suites, synthesis and STA scripts] using a set of configuration files. Note that the amount of auto-generation realizable in the physical design phase was limited since die-size reduction per variant was of paramount importance requiring significant human intervention. The massive hardware configurability was matched by equivalent automation on the software side with derivative specific code bases being generated from the same configuration file.

Emerging MCU trends
From the low end to the high end, unique approaches are being adopted by both mainstream and new MCU entrants.
a) MCUs with mainstream non-proprietary processor cores [eg ARM Cortex-M1, MIPS M4K] and an embedded FPGA array.
b) MCUs embedding two [relatively low-end] processor cores [one for conventional MCU functionality and one dedicated to a specific computationally intensive application – eg high performance multi-channel audio]
c) MCUs embedding non-proprietary cache-less processors with full floating point support [eg. ARM Cortex-M4] along with an external high performance cache sub-system.

Summary
As 32-bit non-proprietary cores begin to dominate, MCU vendors will have to carefully balance their variant mix, single/multi-market strategies, software ecosystem and development methodology to guarantee a successful product line that retains its differentiation over its planned deployment lifetime.

Author Information
Sujeeth Joseph is a Principal Consultant, Semiconductor and System Solutions, for Wipro Technologies.