Embedded Initiative to Accelerate FPGA and Processor Adaption in Embedded Systems

To accelerate the integration of programmable logic and processors in embedded systems, Altera Corp. has announced its Embedded Initiative, wherein the company is providing designers a single FPGA design flow based on its Quartus II development software—including the new Qsys system-level integration tool, a common FPGA intellectual property (IP) library, and new ARM Cortex-A9 MPCore and MIPS Technologies MIPS32 embedded processor offerings. The design flow allows embedded designers to quickly and easily target Altera's Nios II, ARM- and MIPS-based embedded processors and the recently announced configurable Intel Atom-based processor. The Qsys system-level integration tool leverages the industry's first FPGA-optimized network-on-a-chip technology to support a wide variety of industry-standard IP protocols, improved quality of results and numerous productivity features.

"The combination of FPGAs and processors is rapidly expanding to create new levels of customization in embedded systems design," said Vince Hu, Vice President of Product and Corporate Marketing, Altera. "With the Embedded Initiative, Altera is enabling designers in markets such as automotive, industrial, military and wireless to easily leverage a rich ecosystem of processor, operating system and IP support all through a single design flow, and to reduce overall system cost, achieve faster time to market and increase the flexibility of their systems."

As part of its initiative, Altera will expand its current embedded partner programs by embracing the broad ecosystems from ARM, Intel and MIPS Technologies, as well as the FPGA world. In addition, Altera will collaborate with these entities to enhance the design flow and allow access to the growing number of FPGA-enabled embedded processing choices.

Intel recently unveiled details of an upcoming new configurable Atom-based processor. The processor consists of the Intel Atom processor E600 series paired with an Altera FPGA on a multi-chip package. The package provides additional flexibility for customers who want to incorporate proprietary I/Os or acceleration, and enables developers to differentiate their designs by reacting quickly to changing requirements.

"Flexibility is critical for embedded designers, and FPGA technology offers an additional option," said Doug Davis, Intel's Vice President and General Manager for the Embedded Communications Group. "Intel recently announced the integration of an Altera FPGA on a multi-chip package with an Intel Atom-based processor to continue to offer intelligent and flexible solutions for embedded developers."

As part of today's news, Altera unveiled it signed earlier this year an agreement with ARM Ltd to license a range of technologies, including the Cortex-A9 microprocessor. Altera will deliver products that integrate hardened Cortex-A9 processor-based subsystems with 28nm FPGA technology.

Altera has also broadened its portfolio of soft processor cores and will introduce the MP32 soft processor core based on MIPS Technologies' MIPS32 processor architecture in early 2011. The MP32 is a result of close collaboration between Altera, MIPS Technologies and lead customers over the past year. It will complement Altera's Nios II embedded processor and the portfolio of partner soft CPUs available for Altera devices, and significantly extend the number of operating systems and the amount of application code available for use on FPGAs.

Later this quarter, Altera will deliver the Qsys system integration tool, as part of the Quartus II development software. Incorporating the industry's first FPGA-optimized network-on-a-chip technology, Qsys will be able to offer memory-mapped and datapath interconnects that achieve nearly double the performance of Altera's SOPC Builder tool, while being able to support industry-standard IP interfaces, such as AMBA. Qsys will leverage the easy-to-use interface of SOPC Builder and provide backwards compatibility for easy migration of existing embedded systems. Furthermore, this advanced interconnect technology will support hierarchical design, incremental compile and partial reconfiguration methodologies.

Altera

RELATED ARTICLES
Altera Demos 25Gbps Transceivers in 28nm FPGAs

Altera Demos 4K Reference Design

ADI Partners Altera on Wireless Development Platform

Altera FPGAs Provide RLDRAM 3 Memory Support

Altera Enhances Arria II GX FPGAs with 6.375Gbps Transceivers