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| (Top News, 31 Jan 2011 ) |
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Altera Corp. has unveiled its portfolio of 28nm devices, launching differentiated solutions across the new Cyclone V and Arria V FPGA families, the the recently expanded Stratix V FPGA family, and the previously announced HardCopy V ASIC family.
With this 28nm portfolio, Altera leverages advantages in transceiver technology, product architecture, intellectual property (IP) integration, and process technology to optimize solutions that address the diverse design challenges of each of its customers. The company's 28nm devices support transceiver speeds from 600Mbps to 28Gbps; feature on-chip memories optimized for performance and efficiency; have hard and soft memory controllers to support the necessary application bandwidth power and cost requirements, as well as integrate high-end, midrange and low-cost I/Os optimized for performance.
To meet customers’ cost, power and performance requirements, Altera is hardening a range of system-level IP, such as PCI Express (PCIe) Gen2 x1 and x4, PCIe Gen3 x8, Interlaken, 40G/100G and 100 Gigabit Ethernet (100GbE).
Altera is utilizing TSMC’s 28-nm High Performance (28HP) process technology for its high-end product family (Stratix V FPGAs) and HardCopy V ASICs, and TSMC's 28-nm Low-Power (28LP) process technology for use in its low-cost (Cyclone V FPGAs) and midrange (Arria V FPGAs) product families. The 28LP process also enables Altera to deliver an optimal balance of cost, performance and low power. The use of 28HP process technology at the high end is critical in delivering the core and transceiver performance required by high-end applications.
In terms of applications, Altera’s Cyclone V FPGA family is suitbale for motor control, displays and software-defined radios, where low power and board space are concerns. The Cyclone V family offers 40 percent lower total power versus the previous generation devices, 12 transceivers operating at up to 5Gbps, hardened PCIe Gen2 x1 blocks, and hard memory controllers supporting LPDDR2, mobile DDR and DDR3 external memory.
Targeting applications that require a balance of cost, low power and high performance, such as remote radio units, in-studio mixers and 10G/40G linecards, Altera is unveiling its Arria V FPGA family. Offering 40 percent lower total power versus previous generation devices, the Arria V FPGA family devices include transceivers operating at up to 10Gbps, hard memory controllers supporting DDR3 external memory, and efficient systolic finite impulse response (FIR) filters with variable-precision DSP blocks.
The Stratix V FPGA family addresses a broad range of high-bandwidth applications such as advanced LTE basestations, high-end RF cards and military radar. Altera has expanded the capabilities of the Stratix V family to support evolving market needs. The maximum transceiver data rates in Stratix V GX FPGAs were increased to 14.1Gbps to support emerging high-speed protocols, including FiberChannel 1600. Additionally the density of the Stratix V GX FPGA was increased to 1.1 million logic elements (LEs) in a monolithic die, to provide customers even higher levels of integration.
HardCopy V ASICs extend Altera’s leadership in low-nonrecurring-engineering (NRE), low-risk transceiver-based ASICs. Compared to previous HardCopy ASIC devices, HardCopy V ASICs deliver higher performance for transceivers, I/Os, and core logic; with higher levels of logic and memory integration. With these new capabilities, HardCopy V ASICs now support a wider range of high-volume applications which require low power, lower unit cost, or improved single-event upset (SEU) tolerance in production.
Addressing customers’ desire for increased design productivity, Altera’s 28nm device portfolio will be supported by its Quartus II development software, the programmable logic industry's number-one software in performance and productivity for CPLD, FPGA and HardCopy ASIC design. The Quartus II software's new Qsys system-level integration tool simplifies IP integration and offers access to the industry’s broadest offering embedded processor options, including a hardened ARM Cortex-A9 MPCore.
Altera’s 28-nm portfolio
Altera
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