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| ( 01 Mar 2011 ) |
| By Raju R Baddi, Raman Research Institute, Bangalore, India |
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The circuit in Figure 1 lets you build a logic probe using three NPN transistors and three PNP transistors. Two transistors act as switches that drive the LEDs; logic one is a green LED, and logic zero is red. Q1 and Q2 test the probe-tip condition for logic one, and Q3 and Q4 test it for logic zero. Q1 acts as a zener diode in the emitter circuit of Q2. The voltage divider comprising R12 and R14 determines the diode’s value. That value creates a lower limit for the breakdown of the base-emitter junction of Q2 through VL. These values ensure that the threshold value for logic one at the probe tip is approximately 3.2V. Q1’s breakdown voltage in the emitter circuit of Q2 is approximately 2.6V. The equation for setting this threshold is VHIGH=1.2+(VR14/R12+R14),where V is the supply voltage. Because VHIGH is a function of the supply voltage, the probe is suitable for CMOS transistors, as well. When the voltage at the probe tip goes above this voltage, the base-emitter junctions of both Q1 and Q2 are forward-biased, and they have a common collector-emitter current that flows through R4, producing enough voltage to forward-bias Q5 and turning on the green LED. Ideally, R1 and R2 maintain the voltage at the probe tip at approximately 2.5V, which is less than 3.2V.
Transistors Q3 and Q4 form a comparator of their base voltages. The divider combination comprising R8 and R9 maintains the base of Q4 at a specific voltage, which is approximately 1.9V. Because the probe’s suspended voltage is greater, Q3 conducts, and no current flows through R6. Thus, Q6 and the red LED are both off. If the voltage at the probe tip goes below 1.9V, however, Q4 has a higher voltage at its base than Q3, and the common-emitter current through R7 diverts to R6 through Q4. This action produces sufficient voltage drop across R6 to turn on Q6 and, hence, the red LED. The following equation sets the low-voltage threshold: VLOW=[VR9/(R8+R9)].
The current through the probe tip is -50µA to +80µA for a logic voltage of 0 to 5V. This appendix details the derivation of these equations and the probe-tip current. Figure 2 shows the construction method for building a compact probe.
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