Floating-point-DSP Family Adds Processors and Software

Texas Instruments has added the single-core TMS320C6671 to its TMS320C66x family of floating-point DSPs. The device increases clock speed to 1.25GHz and is pin- and software-compatible with other members of the TMS320C66x family, providing an upgrade path from single-core configurations to two-, four-, and eight-core configurations. The company also has added features to the communications-centric TMS320C6670 SoC. These features include a multistandard BCP and accelerators for PHY-layer processing in LTE, WCDMA, TD-SCDMA, and WiMAX applications. The 1.2GHz, quad-core C6670 SOC targets use in SDRs in applications such as public safety and military radios, which require support for fewer users than cellular-radio base stations. The floating-point DSP also supports emerging applications for processing surveillance video in security and defense applications.

TI also recently updated its MCSDK (multicore-software-development kit). The kit provides Linux kernel support for the C66x DSP generation and the OpenMP API (application-programming interface) with a C66x compiler and runtime software for the KeyStone multicore architecture. The MCSDK integrates a software-development platform that includes multicore communication layers for intercore and interchip communication, validated and optimized drivers with TI’s Sys/BIOS realtime operating system, and Linux support with appropriate demonstration examples.

Texas Instruments Inc.