Bookmark and Share Printer-friendly version Email to a Friend

Atomic-scale Films Critical to Transistors

(Technology News, 02 Aug 2011 )
By Ron Wilson, Editor at Large, EDN

As we move past the already problematic 28-nm node, films with thicknesses measured in Angstroms are increasingly vital to the functioning of transistors, and even to the ability to create patters on the wafer. A science-fiction-like ability to deposit a uniform, pure layer of material only Angstroms thick has become a gating skill in several areas of advanced IC manufacturing.

The most obvious critical application for film deposition is the high-k/metal-gate (HKMG) gate stack with which foundries are already struggling at 28 nm. Applied Materials executive vice president and general manager for silicon systems Randhir Thakur, speaking at Semicon West earlier this month, sketched the seriousness of the problem.


On a finFET, the gate stack is the nearly invisible layer between the fin and the arched gate electrode that crosses over the fin.
Click to enlarge

"The industry is actually at a very early stage with HKMG," Thakur said. "I don't expect mass production before 2014. In comparison, we will see the first 3D transistors in 2013, reaching mass production in 2016."

Steve Ghanayem, Applied Vice President and General Manager for Metal Deposition and Front-end Processing, explained further: "In HKMG processing, we are replacing one oxide film with four or five complete processes, including two layers of oxide, atomic-layer deposition of hafnium-oxide, annealing, and nitridization. The layers we are forming are as thin as 3 Angstroms. By the 22nm node, literally half the atoms in the gate stack are in the interfaces between these films. Very small changes in oxide growth, or tiny numbers of trapped impurity atoms, show up in model-level variations in mobility and threshold voltage for the transistors."

Once 3D transistors-finFETs-reach production, an entirely new issue becomes critical: conformality. "We require 15 to 20 layers to form these 3D transistor structures," Thakur said. Worse than the sheer number of layers, though, is the shape. In planar processes, all of the films in the gate stack are deposited on a flat surface or, at worst, onto the flat bottoms of shallow holes. But for finFETs, the gate stack must lie across the fin like a saddle blanket, conforming to the right-angle corners at the edges of the fin and going straight down the sides. Any variation in the thickness of these films, or any rounding or cracking at the corners, will show up as variations in transistor parameters. Thus processes must deposit atomic-layer films that conform almost perfectly to a surface comprising row upon row of tall rectangular ridges.

Nor are gate stacks the only issue. Novellus vice president for process applications Girish Dixit pointed out that conformal film deposition is increasingly vital in lithography, as well. Today each mask exposure requires deposition of several films: a hardmask, an antireflection layer that may itself include two or more films, and a resist layer. "Each of these films is usually conformal," Dixit explained. In double- or quad-patterning scenarios, at least the hard mask has to lie over a surface that already has considerable topology, so the film must conform to complex ups and downs. In the case of a finFET process, the surface may have very high aspect-ratio features on it during the second phase of patterning. "But because the films are conformal," Dixit continued, "any roughness accumulates. And roughness will distort the pattern." Hence these films must not only conform to the topology, but must be smoothable to tolerance much finer than the feature size.

In many different steps, then, the ability to deposit unimaginably thin films, often over complex topology, has become necessary to creating transistors. Each variation in conformality, thickness, purity, or smoothness can appear to chip designers as a variation in transistor-model parameters. It has become a game of Angstroms.

 
Printer-friendly version Email to a Friend
 
Article Rating 
Average Rate: No rating yet
 
Poor Quite Good Good Very Good Excellent
 
 
ADVERTISEMENT
 
Related Content 
 
 
ON-DEMAND WEBCASTS


 
 
Highest Rated  
Feedback Loop  

ADS BY GOOGLE 
 
 
 
ADVERTISEMENT
Press Release 
 
TECHNOLOGY NEWS
 
 
 
PRODUCT NEWS
 
FEATURED SPONSORS
 
 
 
DESIGN CENTERS
 
ADVERTISEMENT
     
Reference Designs 
   
     
 
 
 
 

 

RSS
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   
   

POLL
What type of environmental regulation do you think will be most beneficial for the tech industry?
Proper recycling and disposal
Push for power efficiency and energy conservation
Chemical/lead regulation
View results


 
     
 
Power Technology E-newsletter 
Power.org Releases Power Architecture 32-bit Application Binary Interface Supplement
EDNA, May 11
POL Regulators Designed for Energy-efficient Computing
EDNA, March 11
Fairchild Revolutionizes Power Savings
EDNA, January 11
Lattice Transforms Board Power and Digital Management
EDNA, November 10
 
Analog E-newsletter 
12V Dual-channel Synchronous Buck Converter Features Integrated FETs
EDNA, February 10
Power MOSFETs features reduced top-side thermal impedanc
EDNA, January 10
 
     
 
KNOWLEDGE CENTER
 
Texas Instruments: DaVinci™ Technology
 
Texas Instruments: Safe Bet Series
 
 
INDUSTRY LINKS
 
Photonics Association (Singapore)
Singapore Industrial Automation Association (SIAA)
Taiwan Semiconductor Industry Association (TSIA)
 
 
OUR SPONSORS
 






Keithley Instruments
With more than 60 years of measurement expertise, Keithley Instruments has become a world leader in advanced electrical test instruments and systems from DC to RF (radio frequency). Our products solve emerging measurement needs in production testing, process monitoring, product development, and research...
 
 
 
     
 

EDN India | EDN Taiwan | EDN Korea | EDN Japan | EDN China | EDN | EDN Europe

 
ABOUT EDN Asia | CONTACT US
   
© 2012 EDN Asia All rights reserved.