Analog design in the 21st century: Semiconductor processes and design

Silicon has been dominant since the latter half of the 20th century but can graphene be the new star of the semiconductor process gurus? Graphene has excellent high mobility properties, good thermal conductivity, and is abundant in nature; but it has been a challenge to fabricate high performance transistors and to integrate millions of them together. A stable and defect-free oxide has not yet been found for graphene, germanium or other exotic materials. Silicon does not have that problem.

As a matter of fact, for digital applications, one might think that silicon may be running out of steam, but SOI (silicon-on-insulator) has enhanced device and system performance.

Although the use of silicon sizes equivalent to a few atomic layers and a new technology is inevitable, silicon will be the foreseeable process of choice for a great many years in this 21st century for its cost, abundance in nature, and the fact that micro-machining has been optimized for silicon. Besides this fact, MEMS-based sensors and transducers are now effectively processed in micro-fabrication to integrate into the AFE.

Semiconductor, LED, and MEMS fabs and foundries play a vital role in the industry. Over the years, there have been sizeable investments in the building of these complex front-end fabs. Also, there have been fabs that have invested in being able to accommodate larger wafer size changes as well as changes in technology nodes. Just recently, there has been news about fabs that have started to spend again in the area of capital equipment.

Organic transistors
A forward-looking analog process discussion must include organic transistors. The OFET (Organic Field-Effect Transistor) in particular, can be manufactured at low temperatures, enabling the fabrication of IC’s on flexible plastic substrates and the coverage of large areas at potentially low cost.

Organic semiconductors could soon open up whole new possibilities for use in electronics that are impossible with today's conventional crystalline materials such as silicon. The big advantage of organic semiconductors is how they make it relatively easy and inexpensive to process electronic products with unusual properties, such as transistors, light emitting diodes, or solar cells: as thin, flexible, and transparent films of almost any size.

Texas Instruments
In Q3 2009, Texas Instruments (TI) announced the opening of RFAB, the industry's first 300mm analog wafer fab in Richardson, Texas. Today, RFAB is in full production with each wafer producing thousands of analog chips. Analog process technologies running in the fab include LBC7, a linear BiCMOS technology used in power management devices, and C05, a 180nm technology that has been optimized for analog.

This new fab demonstrates how important the integration of analog, digital, and power technologies—at cost effective price points—has become to the analog designer. Driven by increasing demand for sophisticated and integrated analog components this fab will extend the capabilities of TI’s analog technologies into new applications and systems such as smartphones and netbooks to computing and medical systems.

LBC7 not only offers a diverse range of features for analog and power products, but its adaptable process flow can also be configured for simple chips or more complex custom mixed signal devices with fairly large digital cores. Moreover, LBC7 can produce a range of analog products and cost effective power management devices.

NJR (New Japan Radio)
NJR has started "The Analog Master Slice service" which can reduce the cost and lead-time of developing new analog IC/LSI.

Integration of discrete function is conventionally solved by using existing commodity products or customized products, but this technique is "lacking the functions" and customers "can't afford the cost and lead time for the new project." NJR now offers more design flexibility and reduced development time in response to these issues.

The Analog Master Slice is the service which offers the original analog semi-customized IC/LSI for customers. The wafers which are prefabricated transistors, resistors, capacitors, and other devices are prepared, then creation of the original IC/LSI is accomplished by adding the glass mask of wiring layers to be customized as desired. The cost and lead time can be reduced since the common master slice is utilized. The lead time for ES (engineering samples) is usually 4 weeks after the layout design is completed. Standard customized IC/LSI usually takes at least 24 weeks.

TSMC
TSMC has started on Phase 3 of its Fab 15 GigaFab in Taichung, which is being built for 20nm processing.

GlobalFoundries
GlobalFoundries has confirmed that its new factory in Saratoga County, NY, known as Fab 8, will start ramping production in the summer of 2012. The company gave more details of its plans to move from 28nm production to 20nm production in 2013, and ultimately to 14nm.

X-FAB
As the world's leading foundry group for analog/mixed-signal semiconductor applications, X-FAB creates a clear alternative to typical foundry services by combining solid, specialized expertise in advanced analog and mixed-signal process technologies with excellent service, a high level of responsiveness and first-class technical support. X-FAB manufactures wafers for automotive, industrial, consumer, medical, and other applications on modular CMOS and BiCMOS processes in geometries ranging from 1µm to 0.18µm, and special BCD, SOI, and MEMS long-lifetime processes.

In November 2011, X-FAB announced their new technology platform XP018, its latest foundry process with the industry’s lowest mask count for the modular combination of digital, analog, and high-voltage features with embedded Flash. This unique foundry offering for energy-efficient applications is the first to allow SOC integration requiring up to 60V operating voltage and 5V power supply to be combined with embedded NVM (non-volatile memory). It enables a new generation of reliable and efficient power management, digital control, and other power control SOC applications.

What this all means to the analog circuit designer is smaller, lower-power, lower-cost, and highly-integrated ICs with which they can design new products in such markets as hand-held devices and medical implantables that were never before considered due to cost constraints and physical size issues.

IC designers' challenges and their tools
It’s impossible to have a discussion of easing the task of the analog circuit designer without discussing IC layout and design tools, especially in the newest/smallest process technologies like 45nm and 28nm. The industry is also moving quicker than expected to 20nm. The analog circuit designer needs the newest, highly integrated mixed-signal ICs in his or her hands as quickly as possible in order to develop the next generation of new end product solutions demanded and driven by customers' needs and desires.

A new analog era is coming with nanometer technologies. An example is where Multimedia Applications Processor needs are pushing CMOS technology in the low nanometer range. Analog is more than ever a key ingredient of advanced SOC with high performance PLL, giga-sample high speed serial links, and embedded power management. The MOS device performance is going beyond analog designer dreams. These performances pave the way for new sets of applications such as embedded mmW and digitally-boosted analog functions for new market opportunities.

Cadence advocates a more efficient approach to mixed-signal design, one that leverages an integrated mixed-signal methodology in which early design planning, front-end design, functional verification, physical implementation, and packaging are shared responsibilities between analog and digital teams.

With EDA360, a new vision for what the EDA industry can become, Cadence starts with an understanding of the software applications that will run on a given hardware/software platform, define system requirements, and then work their way down to hardware/software IP creation and integration.

EDA360 supports three fundamental capabilities:
• System realization: EDA360 uses an application-driven approach to system realization. Developers start by envisioning the application; they can then design at the system level, work down to the software, and finally build or buy the hardware.

• SOC realization: While system realization produces a complete hardware/software platform ready for applications deployment, SOC realization ensures the successful development of a single SOC to meet system needs. SOC realization requires the selection and integration of high-quality digital, analog, and mixed-signal silicon IP.

• Silicon realization: Silicon realization goes far beyond the traditional view of “mixed-signal” design, which typically involves the importation of hard analog macros into a digital SOC. It also involves the creation of full-custom digital, analog, and RF IP blocks and ICs. And it means integrating blocks (that were entire chips in previous process generations) into SOCs that support broad ranges of functionality (Figure 2).

A must see, to help understand analog IC designer challenges and solutions, is a series of You Tube interviews with analog consultants and designers by John Pierce, Director, Product Management at Cadence:

All Things Analog Interview with Triune Systems: Power applications

All Things Analog Interview with GHz Circuits: PLL Design

All Things Analog Interview with Designer’s Guide Consulting: Mixed Signal Verification

Magma Design and Fujitsu Semiconductor
Magma Design Automation, a provider of chip design software, announced that its Titan ADX (Titan Analog Design Accelerator), was adopted by Fujitsu Semiconductor. This software will be used to optimize and port a variety of analog IP (intellectual property) circuits to new design specifications and processes. It will increase designer productivity, to accelerate turn-around time on SOCs and to reduce the cost of analog design and reuse.

Fujitsu Semiconductor produces a variety of LSI (large-scale integration) circuits for automotive, consumer, industrial, networking, and wireless applications. With the new Magma Titan ADX, they can now minimize development time. With the seamless integration of Titan ADX's optimization technology into their existing analog design flow, they can now very quickly change the specifications such as reducing the power budget on an LSI design, and port their analog IP to new processes. This improvement in design flow efficiency enables them to deliver their next-generation LSI circuits on time while reducing development costs.

Unlike time consuming simulation-based optimization tools, Titan ADX leverages a unique high-level abstraction of an analog circuit, called a FlexCell. It applies this abstraction in an advanced non-linear, constraint-based optimization algorithm to allow designers to quickly and easily port the IP to any process and optimize the circuit for specific power and area requirements.


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