"Corporate decision is swinging away from ASIC to FPGA"

EDN Asia: What has been Xilinx's experience from the point of view of technology implementation, market acceptance, and profitability for 90nm products?

Vij: There are three technological challenges in implementing 90nm products. The first is lithography, which has been more or less successfully met. The second is introduction of new materials, such as low-k dielectric. This challenge is proving itself to be greater than what had been anticipated. Some progress has been made on this front, but the technology has still to mature. We got over this problem by moving away from low-k to FSG. We have not introduced any new material into our 90nm products. We shall go for low-k only when we are convinced that the technology is fully evolved. The third is migrating to new fabs with the capacity of making the product. This challenge too has more or less been successfully met.

Regarding market acceptance and profitability, it is too early to expect significant gains. We have already sold 500,000 Spartan 3, and the market is picking up. Spartan 3 was introduced early 2003. It isn't expected to be profitable till next year. 90nm products will have a cycle life of 10 years. We are at present very early in this cycle life. What is important today is to be present at this node rather than look for profits.

EDN Asia: There are some criticisms that Spartan 3 family of products does not meet original Xilinx specifications on the inter-metal dielectric front.

Vij: The decision to use FSG and not low-k in Spartan 3 was not a change in Xilinx' original strategy. Xilinx has decided to base its Spartan 3 on a 90nm process from UMC, with the option to deploy a range of technology options, including low-k. For Spartan we did not need low-k. Our goal was to have the lowest-cost solutions. Performance was not a primary motivator. There is no requirement that 90nm technology should be offered only with low-k. This technology can be offered either in low-k or FSG configuration.

EDN Asia: Will low-cost solutions use low-k?

Vij: It would take months, if not years, before low-k reaches mainstream chip production. Low-k will generally be used in higher-end chips.

EDN Asia: How do you look at FPGA versus ASIC scenario?

Vij: The trend in semiconductor is from fixed towards programmable functionality. We have seen this happening in memories, DSPs and logic. Now we are seeing it in ASICs and FPGAs. Fixed-functions products will gradually die away, or have niche applications. The recent downturn has aided the transition from ASICs to FPGAs. Billions of dollars worth ASICs were written off. The value of FPGAs written off was many times less. ASIC design starts are drastically falling. Ten years ago there were 10,000 ASIC design starts, now merely 2,000. Many of our customers have stopped ASIC designs. In contrast, FPGA design starts have reached 100,000 this year. Corporate decision is swinging away from ASIC to FPGA, and this trend will continue. Besides programmability, field upgradeability is another FPGA capability speeding transition from ASICs to FPGAs. I envisage FPGA market becoming larger than ASIC after some years. While ASICs will have a good market in high-volume applications requiring high integration levels, outside this niche ASICs will decline and FPGAs take over.

EDN Asia: FPGA market is worth only $3 billion. Besides, no new players seem to be entering this segment, with Xilinx and Altera dominating through years.

Vij: FPGA market will grow to $5 billion in 2007. The profit margin is over 60 percent. We sell more FPGA dollar than most companies selling ASIC dollars. Unlike other semiconductor segments, FPGA is an extremely difficult and complicated area to enter. FPGA is more software and less silicon. Most semiconductor companies are more experienced in silicon than in software. They ventured into FPGAs, but failed; hence exited. The software fortress keeps the market protected.

You can reach Kirtimaya Varma at kirti.varma@rbi-asia.com