Bargain Shopping: Searching for inexpensive programmable-logic assistance

The last feature article in EDN that discussed free and low-cost development support for PLDs and FPGAs appeared in 1997 (Reference 1). In reviewing both that article and a subsequent Leading Edge write-up on the subject, I discovered that many companies those articles mentioned no longer participate or have greatly scaled back their involvement in the programmable-logic business (Reference 2). Silicon suppliers AMD and Lucent Technologies, later Agere Systems, sold their product lines to Lattice Semiconductor; Anachip acquired ICT; Motorola terminated its FPGA-development efforts; ST Microelectronics bought Wafer-scale Integration, and Xilinx took over Philips' product line.

Neither Atmel nor Cypress Semiconductor responded to my multiple requests for input on this article, suggesting that there may be some truth to the rumor that both companies' programmable-logic product lines are on life support.Turning from silicon to software, Xilinx acquired the Synario division of
Data I/O. To some extent, this consolidation reflects normal Darwinian survival-of-the-fittest trends that occur in any maturing segment of the electronics industry. The high-technology recession that's gripping the industry and shows no sign of letting go, however, has accelerated the consolidation. That same recession puts unrelenting and increasing pressure on you to reduce your system designs' development and bill-of-materials costs, making the topic of free and almost-free PC software even more relevant today than it was in 1997. (This article is also broadening beyond the previous article's focus on software to include other development tools.)

Your needs are, however, at odds with those of the remaining silicon and software suppliers, which are loath to supply free or low-cost development tools, especially when the return on their investment is unclear. They're happy to provide you with time- or critical-feature-limited versions of their products, but, to do any meaningful development work and get your design into production, you eventually need to crack open your wallet and shell out hundreds or thousands of dollars (see sidebar "Try before you buy"). Exceptions to this rule do still exist, though, and, just as computer users tired of giving money to Microsoft are turning to open-source operating systems and applications, users of development tools might want to tap into the open-source movement for assistance with their programm-able-logic efforts (see sidebar "Open-source opportunities and additional references").

Software assistance
Entry-level versions of vendors' design suites typically support a subset of product families and devices with a restricted set of functions. Version 2.2 of Altera's freely downloadable Quartus II Web Edition software, for example, focuses its attention on mainstream Max 3000 and Max 7000 CPLDs and Acex, Cyclone, and Flex 6000 FPGAs, and it works with only one or a few devices in higher end FPGA families. It supports schematic- and text-based design entry, Verilog and VHDL synthesis, functional simulation and timing analysis, placement and routing, and device programming through ByteBlaster, ByteBlasterMV, and MasterBlaster cables.

Max+Plus II Baseline, another free tool set from Altera, compre-hends the older AHDL design language and Classic product families. The Altera design-software-starter-suite CD-ROM includes both Quartus II Web Edition and Max+Plus II Baseline. Sign up for a Quartus II subscription, and you'll obtain support for all devices in Altera's product portfolio, along with behavioral modeling and test-benches, LogicLock block-based incremental design, faster fitting algorithms, Tcl scripting, and SignalProbe incremental routing.

Xilinx's counterpart to Altera's freeware comes as the free ISE WebPack and WebFitter, both incorporating technologies the company obtained in its acquisitions of synthesis vendors Minc and Synario (Reference 3). ISE WebPack is conceptually similar to Quartus II Web Edition; it supports a subset of Xilinx's product line, and technical support services are available only through Xilinx's Web site. ISE WebPack neither interacts with the Core Generator and FPGA Editor tools nor comprehends ChipScope Pro design verification. Unlike Quartus II Web Edition, ISE WebPack allows not only Verilog and VHDL design entry, but also Abel language synthesis.

All ISE variants interface with the optional free Mentor Graphics-developed ModelSim Xilinx Edition simulator, and other freeware ISE WebPack add-ons include the HDL Bencher automatic testbench generator, the StateCAD automatic state-machine-design generator, the ChipView prefit and postfit graphical utility to assign and view pin and logic placement, and the Xpower graphical power-analysis tool. Spreadsheet- and Web-based power-analysis tools are also available from Xilinx (Reference 4). Whereas ISE WebPack runs only under Windows operating systems, WebFitter's Web-based interface also supports Unix and other browser-compatible operating systems. The focus with this tool is exclusively on Xilinx's CPLDs. It provides easy access to reports, notes, and device-price quotes. WebFitter enables design conversion from other tools and other manufacturers' devices.

If Altera and Xilinx are offering free downloadable design-software suites, it's a good bet that the third largest programmable-logic vendor, Lattice Semiconductor, is doing the same thing. The only catch with the ispLever starter kit is that you need to register the product every six months to obtain a new license file. The ispLever starter version supports Lattice's SPLD, CPLD, and GDX products, but not its Agere-acquired and internally developed FPGA devices; for these parts, you need to upgrade to the $495 ispLever Base or more expensive variants. Design-entry options with the ispLever starter kit include Verilog, VHDL and schematics, timing- and pinout-constraints entry, Mentor Graphics- and Synplicity-developed synthesis engines, the Lattice-developed ispVM program-ming utility, and the ability to handle both functional and timing simulation.

A few years ago, I learned VHDL using Cypress' Verilog- and VHDL-inclusive Warp tool set (Reference 5). Selling for $99, it includes the comprehensive VHDL for Programmable Logic reference manual. Warp supports both Windows and Unix operating systems, and its finite-state-machine editor and timing simulator come from Aldec. Unlike some other tool sets I've evaluated, it lets you easily create device- and vendor-independent HDL designs in Warp that still efficiently compile to Cypress programmable-logic devices.

Actel's free Libero Silver integrated-design-environment software in some cases supports only the smallest member of a device family or, in other cases, those devices in a product family with 10,000 or fewer system gates, and it lacks simulation capability. The company's Designer Gold tool set, a back-end placement-and-routing and programming suite intended for engineers who own both synthesis and simulation programs, is similarly restricted to either the smallest member of a device family or those with 50,000 or fewer system gates. Like Xilinx, Actel also offers freely down-loadable power-consumption-estimation utilities on its Web site. Antifuse competitor QuickLogic doesn't offer a less-than-$100 develop-ment tool suite, but if you have synthesis and simulation tools, the company will provide you with a free place-and-route utility that has no restrictions on which device you use it with.

Hardware help and prefab designs
Scan the vendor catalogs looking for hardware that costs less than $100, and most of what you'll find are narrowly focused items, such as download cables and packaging adapters. When I was planning this article, I was thinking more along the lines of comprehen-sive hardware, such as demon-stration boards, logic analyzers, programmers, and the like (Reference 6). Fortunately, a few fiscally sensitive hardware candidates also satisfy this broader vision.

From Altera comes the $99 Max 7000 Quick Start development Kit (Figure 1a). It includes an evaluation board containing an EPM7128, four multiplexed, seven-segment LED displays, a power LED, test points, a clock oscillator, pushbutton switches, and expansion headers. It also includes a ByteBlasterMV download cable and a Quick Start guide, a 6V power supply, design software, and documentation. Xilinx based its similarly configured $49.99. Cool-Runner-II design kit on the XC2C256 (The press release states that this kit is free "to qualified customers through the Xilinx worldwide distributor base".) It includes an additional pad for a CoolRunner-II or XC9500 CPLD in a 44-lead VQFP (Figure 1b). Published prices for other vendors' evaluation boards don't meet the $99.99-or-less criterion necessary for inclusion in this article, but shrewd negotiating on your part may secure you a lower-than-retail cost.





Figures 1a and 1b: Altera's US$99 Max 7000 Quick Start Development Kit (a) just breaks through the $100 price barrier. A CoolRunner-II development kit (b), including hardware, costs $49.99 at the Xilinx Web site or is free through your distributor.

Perhaps an expensive, comprehensive piece of hardware is overkill for your needs; schematics and Gerber files, HDL and software source code, and other reference materials for a validated and easily customizable design may be sufficient. For those humbler desires, nearly all the vendors' Web sites contain freely downloadable material that will be of assistance. Xilinx's resources are perhaps the best organized at the moment; the ESP (Emerging Standards and Protocols) section of the vendor's Web site contains information categorized by various applications, such as automotive telematics, digital video, and networking. You'll also find reference designs within each product family's collateral listing; Xilinx's competitors' sites also categorize information by application and product family.

Core principles
Maybe, though, you prefer to do the system design all by yourself, or it's for an application so novel that it hasn't yet appeared on programmable- logic vendors' radar screens. In this case, you might still welcome some economical assistance designing the circuitry inside the FPGAs and PLDs you're using. Altera offers a free, single-data-rate SDRAM-controller reference design, and the company claims that its CORDIC (Coordinate Rotation Digital Computer) and logarithmic-function reference designs are also free, although the Web pages calls these two designs "free-testdrive" versions.

The Altera Embedded Processor Portfolio, available at no cost on CD-ROM, is a collection of prebuilt configurations based on the "soft" Nios embedded-processor core and targeting Apex, Cyclone, Excalibur, and Stratix FPGAs. You can freely design and ship products containing Embedded Processor Portfolio designs with software developed under Red Hat's GNUPro Tool kit, without paying license or royalty fees. You use the SOPC (system-on-programmable-chip) Builder system-development tool to create custom embedded-processor proliferations if nothing in the Embedded Processor Portfolio suits your needs.

Unlike Altera with its one-size-fits-all Nios, Xilinx offers both the high-end 32-bit MicroBlaze CPU and the lower-end and free 8-bit PicoBlaze CPU soft embedded-processor cores. A generic C cross assembler and user-customizable VHDL source code, along with numerous application notes and reference designs, are available for download from Xilinx's Web site, targeting CoolRunner-II CPLDs and various Spartan and Virtex FPGA families. Xilinx claims that the CoolRunner-II version occupies only 107 macrocells, whereas the PicoBlaze for Spartan-IIE occupies 76 logic slices, and PicoBlaze for Virtex-II Series FPGAs reaches performance as fast as 55 MIPS.
QuickLogic has internally developed what it calls "basic-building-block" cores, such as SDRAM controllers and 16550 UARTs, which, according to FPGA product manager Brian Faith, it provides free in Verilog and VHDL source-code format. The company has partnered with Amphion for higher complexity DSP-tailored cores, such as channel coding, math functions, and voice processing, all also available free to customers using QuickLogic devices.

Author Information
Technical editor Brian Dipert wishes that some of these free and low-cost tools were available back when he was regularly doing programmable logic-based designs!

Reach him at 1-916-454-5242, fax 1-617-558-4470, bdipert@edn.com, and www.bdipert.com.

References
1. Grosse, Debora, "Free and almost-free PC software supports PLD/FPGA design," EDN, Jan 16, 1997, pg 87.
2. Dipert, Brian, "If not free, at least reasonable," EDN, March 3, 1997, pg 12.
3. Dipert, Brian, "Synthesis shoot-out at the EDN corral," EDN, Sept 11, 1998, pg 95.
4. Dipert, Brian, "Programmable logic: Beat the heat on power consumption," EDN, Aug 1, 1997, pg 57.
5. Dipert, Brian, "Getting a handle on HDLs," EDN, May 7, 1998, pg 71.
6. Dipert, Brian, "Tools help you lose the hardware blues," EDN, April 18, 2002, pg 36.

At a glance

• Low-cost design-software suites typically lack behavioral synthesis and support a restricted set of chips.


• Only a few evaluation kits for less than $100 exist, though tough negotiating might expand your options.


• Reference designs, in contrast, are plentiful and easy to obtain.


• Just a few years ago, a low-end PCI core cost hundreds or thousands of dollars and filled up even the largest FPGAs.
Now, "soft" CPU cores are free and barely put a dent in available chip resources.

• Open-source efforts and try-before-you-buy programs provide additional options.

Sidebar: Try before you buy

This article focuses on full-featured tools that let you complete a design and that have no restrictions on the length of time you can use them. If your objective, however, is to only testdrive a tool set before you purchase, the number of options available to you greatly expands. Common variations on the evaluation concept are that the tool may operate in a fully functional form but only for a few days or weeks, it may operate in a limited-function manner, or it may incorporate both time and function limitations. Try before you buy isn't restricted to design software; with Altera's MegaCore functions, for example, you can take the development flow all the way through design, simulation, and layout, though you can't generate the all-important device programming file without first purchasing a core license.

Sidebar: No Reply At All

I contacted many other companies, in addition to those whose products this article mentions. Leopard Logic, Mentor Graphics, and STMicroelectronics indicated that they had nothing to contribute that met my less-than-$100 criterion. Despite repeated attempts, I heard nothing from Aldec, Anachip, Atmel, Cadence, Cypress, Synopsys, or Synplicity. When possible (and, for companies that responded, in case their information was incomplete), I also conducted my own information gathering via perusal of company Web sites and my archive of press releases and other literature. However, because companies are sometimes reluctant to publicize theirlow-revenue products, free and low-cost development-tool options may exist that my sleuthing didn't uncover. I recommend that you supplement reading this article with contacting your company or distributor sales team for more suggestions.

Open-source opportunities and additional references

Rune Baeverrud's Freecore Web-site collection of free Altera AHDL-based cores, not surprisingly, went on hiatus soon after he left Altera for competitor Xilinx. Fortunately, you can still find an archive of the cores at Web site www10.brinkster.com/nsfreecore . You can find other extensive open-source core collections at www.opencores.org and www.free-ip.com. You'll find a fully synthesizable implementation of the Motorola 68HC11 CPU, except for support for divide instructions, at www.gmvhdl.com/ hc11core.html. A Rijndael encryption core for Xilinx FPGAs is at www.cs.berkeley.edu/~nweaver/rijndael, and the F-CPU group at www.f-cpu.org is designing an open-source 64bit SIMD superpipelined RISC CPU core.

What about open-source design software? Numerous projects are under way, many targeting the Linux operating system, which many commercial EDA providers are wary to support. The gEDA group at www.geda.seul.org is working on producing a full suite of EDA tools available under the GPL (GNU Public License). The FreeHDL Project at www.freehdl.seul.org is working on a free, open-source GPL VHDL simulator for Linux.

Alliance (www-asim.lip6.fr/alliance) is a complete set of free CAD tools and portable libraries for VLSI design, including a compiler and a simulator, logic synthesis, and automated place-and-route utilities. The Streams-C open-source C-to-FPGA compiler, along with other tools, is available at http://rcc.lanl.gov/Tools.

Some sites are collections of links to other sites fitting the freeware and shareware descriptions. Visit, for example, the www.fpgacpu.org
site of Jan Gray, a long-time advocate of, as his URL implies, implementing microprocessor functions in FPGAs. Jeremy Fox compiled a now-five-year-old list of freeware, shareware, and academic-tailored EDA tools at www.mrc.uidaho.edu/cgi-bin/w3-msql/vlsi/CADfree.html. Optimagic's Programmable Logic Jump Station (www.optimagic.com) offers a number of link lists, including one labeled "free software." And, for the latest and greatest free and low-cost development tools news, regularly monitor the comp.arch.fpga newsgroup.