Soft-core processor features advanced memory architecture
( 01 May 2003 )
Shree Jaisimha
Altera's Nios licensable soft-core embedded processor is a general-purpose RISC CPU that can be combined with a wide array of peripherals, custom instructions and hardware acceleration units to create a custom SOPC (system-on-a-programmable-chip). The Nios Processor Version 3 takes advantage of the advanced memory features of Altera's high-performance Stratix and Cyclone device families for improved system performance.
The processor features user configurable L1 (level one) instruction and data caches that work in tandem with dual-ported memory architectures on the Stratix and the low-cost Cyclone devices. The Nios processor gives you single-cycle access to low-cost SDRAM devices at speeds of above 100 MHz.
The processor also features a JTAG-based OCI (on-chip instrumentation) core that gives software developers an invasive real-time debugging edge. The OCI core works with Accelerated Technology's codeLab Developer Suite to provide an integrated developer environment that offers real-time debug and trace processor capabilities. The software support in the processor extends to network protocol support for APR, IP, ICMP, TCP, UDP and Ethernet.
The Nios Processor Version 3 with Nios Development Kit is available at US$995; expired subscriptions for the Nios Processor can be renewed at US$495 to receive a 1-year update.
Altera's Nios licensable soft-core embedded processor is a general-purpose RISC CPU that can be combined with a wide array of peripherals, custom instructions and hardware acceleration units to create a custom SOPC (system-on-a-programmable-chip). The Nios Processor Version 3 takes advantage of the advanced memory features of Altera's high-performance Stratix and Cyclone device families for improved system performance.
