Cadence Partners for VLSI Training

The Indian arm of Cadence Design Systems Inc. has partnered with TTM Institute of Information Technology (TIIT) and the University of California, Santa Cruz to offer a certified program in VLSI design engineering to Indian engineers.

The six-course training program, offered in Hyderabad and Bangalore, is aimed at training electronic and computer engineering graduates in VLSI logic design and layout. The courses are taught using Cadence softwares like SoC Encounter XL, Encounter ATPG, Incisive Unified Simulator, Virtuoso XL Layout Editor, Assura DRC/LVS, Assura RCX, etc.

"This is a pioneering effort between industry and academia to address the gap in the supply of skilled design engineers," says Himanshu Singh, executive director of India and SAARC, Cadence Design Systems (I) Pvt Ltd.