Chartered, IME collaborate on advanced fine-pitch packaging research
(Technology News, 19 Jul 2006 )
Chartered Semiconductor Manufacturing, semiconductor foundries, and ASTAR's Institute of Microelectronics (IME), Singapore have entered into a research collaboration to optimize a range of fine-pitch packaging technologies for copper metallization and low-k dielectric silicon processes at 65 nanometer (nm) and below.
The research is based on the 65nm processes developed by Chartered and its joint development partners, IBM, Infineon Technologies and Samsung Electronics Co.
Dr. Liang-Choo LC Hsia, senior vice president of technology development at Chartered, said, "Our collaboration with IME is aimed at developing industry solutions that give the semiconductor industry a silicon-proven fine-pitch packaging solution. With the transition to 65nm, companies are realizing that having a successful backend packaging strategy is a key to realizing volume ramp quickly and meeting time-to-market goals. Chartered is committed to being a leader in research and development of solutions that support our customers in realizing superior and reliable results in partnership with a value chain."
Professor Dim-Lee Kwong, executive director of IME, stated, "The research collaboration integrates IME's proven expertise in backend packaging know-how with Chartered's success in advanced copper metallization and low-k dielectric process manufacturing. We are excited with the opportunity to work together to resolve one of the industry's most challenging back-end integration challenges and provide our mutual customers with a reliable path from manufacturing to final chip packaging."
