Robert Tan
Principal Engineer
Automotive System Application Engineering Group
Infineon Asia Pacific Singapore

The XC2000 family of microcontrollers will enable scalable upgrade for users with a common cpu core and memory size upgrades. The 16/32 bit product architecture allows flexibility of handling long (32bit) and long long (64bit) length data. The core also has a DSP core and special DSP instructions to execute multiply and accumulate. The family of devices also uses common peripherals and registers. Product pin configuration is also compatible within family devices, allowing the reuse of the same pcb with different device pad footprints added. Performance ranges from 40M to 100Mhz with flash size ranging from 64k to 1600k bytes. There are various safety features like memory protection, ECC (memory error correction) and voltage supervision. The dual ADC allows independent measurements of analog signals at the same time. A unique serial communication module USIC allows flexibility to configure for LIN, RS232, SPI, I²C and I²S protocols. Multi CAN modules with gateway function are also available. On software, the XC2000 family has a suit of drivers which are AUTOSAR compliant. Lastly it has a C code generation tool called DAVE that can help in configuring and initialising cpu core and peripherals.

Ganesh Kumar
Application Engineer
Tektronix India

One of the most common applications requiring long record length is serial data analysis in embedded system design. Embedded systems are literally everywhere. They can contain many different types of devices including microprocessors, microcontrollers, DSPs, RAM, EPROMs, FPGAs, A/Ds, D/As and I/O. These various devices have traditionally communicated with each other and the outside world using wide parallel buses. Today, however, more and more embedded systems are replacing these wide parallel buses with serial buses due to less board space required, fewer pins, lower power, embedded clocks, differential signaling for better noise immunity and most importantly, lower cost. While serial buses have a large number of benefits, they also present significant challenges that their predecessors (parallel buses) did not. Debugging bus and system problems can be more difficult, because it is harder to isolate events of interest and it is more difficult to interpret what is displayed on the oscilloscope screen.

Sanchit Bhatia
Applications Expert
Agilent Technologies


Debugging digital circuitry and DDR Memories at physical and protocol level

This paper will discuss debugging buses like I2C & SPI etc in a digital system which embedded system designers almost always encounter. Secondly, since FPGAs are used heavily in embedded designs these days, probing internal nodes of an FPGA through automated tools to save time is also discussed. Thirdly, DDR is the most widely used memory technology today. DDR is a complex bus with read and right on the same bus upto 1.6GT/s speeds. This paper will focus on probing DDR signals and separating read and write signals for detecting signal integrity problems. Probing DDR bus for protocol analysis is also discussed.

Mir Hidayathulla
Practice Manager - Modeling Presales
Telelogic

Model Driven Development (MDD) for Embedded Systems

One of the major advances in software engineering design has been the use of the Unified Modeling Language (UML) for embedded designs.

MDD environment is increasingly being used for creating embedded applications. The key enabling technologies consist of modeling, requirements traceability, Design For Testability (DFT), complete application generation (in various languages like C, C++,JAVA and ADA) and support for collaborative development.

MDD is capable of fully modeling system architectures across any discipline, and allows the simulation, implementation and testing of those architectures in an easy push-button environment on host environments or directly on the target hardware.

Narayan Shenoy
General Manager – Consumer Electronics
Wipro Technologies

Engineering Digital Media Convergence

The evolution of technology has made it possible today to blend and deliver information and services across multiple mediums and through multiple channels, giving consumers greater freedom in choosing the time, place, format and choice of the access devices. One of the recent consequences of this technology maturity we are seeing is the convergence of digital media and its seamless   delivery across a plethora of devices, networks and services being delivered.  In consumer language in can be aptly put as offering the seamless media experience in digital format anywhere, anytime and in their mode of choice. 

In today's consumer oriented market place, Digital Media is the key integration factor in bringing multiple consumer devices together to connect and collaborate in providing new and innovative converged services across different networks and service platforms. On going deeper, one gets a view that this convergence is not only enabled and accelerated by technology maturity but also advances in areas such as local connectivity between devices, common device platforms and frameworks across mobile, consumer electronics and automotive devices.
It is also enabled by common service delivery platforms and frameworks across fixed and wireless networks.

The engineering challenge in delivering this seamless "Digital Media Delivery" experience is spread across, device realization, network and service infrastructure development and service creation & delivery within a shorter window of time to market and at a rationalized price point.

M. Thangarajan
General Manager and Head Operations
Tata Elxsi Limited

Embedded Product development at Tata Elxsi

Content to be advised